[Bug optimization/12630] [3.4 regression] Various unrecognizable insns and ICEs at -O3

[jh at suse dot cz]

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12630



------- Additional Comments From jh at suse dot cz  2003-10-16 21:00 -------
Subject: Re:  [3.4 regression] Various unrecognizable insns and ICEs at -O3

> PLEASE REPLY TO gcc-bugzilla@gcc.gnu.org ONLY, *NOT* gcc-bugs@gcc.gnu.org.
> 
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12630
> 
> 
> 
> ------- Additional Comments From dave at hiauly1 dot hia dot nrc dot ca  2003-10-16 20:46 -------
> Subject: Re:  [3.4 regression] Various unrecognizable
> 
> > > (insn 6 4 7 0 ../../gcc/gcc/varasm.c:1902 (parallel [
> > >             (set (mem/s:BLK (reg/f:SI 95) [102 d+0 S24 A32])
> > > 		(mem/s:BLK (reg/v/f:SI 94 [ d ]) [102 d+0 S24 A32]))
> > > 	    (clobber (reg/f:SI 95))
> > > 	    (clobber (reg/f:SI 96 [ d ]))
> > > 	    (clobber (reg:SI 97))
> > > 	    (clobber (reg:SI 98))
> > > 	    (clobber (reg:SI 99))
> > > 	    (use (const_int 24 [0x18]))
> > > 	    (use (const_int 4 [0x4]))
> > > 	]) 72 {movstrsi_internal} (nil)
> > >     (nil))
> > > 
> > > Insn 5 has been deleted.
> > > 
> > > I don't see any way to have an insn with an operand that's both an input
> > > and clobbered.
> > 
> > This is not problem - you simply load the value into input operant and
> > then don't expect it to stay there after the instruction.
> > The transfromation above looks valid to me.  Reload ought to be able to
> > manage the set operand match clobbers.
> 
> Possibly reload would fix this up but we didn't get that far.  The problem
> as I see it is that there is no indication that SI 94 is clobbered and
> has to die.  I think this is why there is an inconsistency in the death

Before reload this does not matter.  As long as clobber mentions other
register, 94 does not die.
Reload later should realize that 94 and 95 needs to sit in the same
register and copy 94 around...
Perhaps that is 95/96 that is just clobbered for no obvious reason
bringing GCC down, but that ought to work as well on the other hand I
can't come up with sane use for this construct so it is most probably
not tested.
I am attaching the patch to use match_scratch instead so we don't end up
with insane clobber of the pseudo, but I don't even have time to compile it
right now.  I am not sure whether the use of match_scratch in expander
is valid.  If not, it will be necessary to expand it by hand...

Honza

Index: pa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.md,v
retrieving revision 1.131
diff -c -3 -p -r1.131 pa.md
*** pa.md	24 Sep 2003 01:38:32 -0000	1.131
--- pa.md	16 Oct 2003 20:58:12 -0000
***************
*** 2945,2952 ****
  (define_expand "movstrsi"
    [(parallel [(set (match_operand:BLK 0 "" "")
  		   (match_operand:BLK 1 "" ""))
! 	      (clobber (match_dup 7))
! 	      (clobber (match_dup 8))
  	      (clobber (match_dup 4))
  	      (clobber (match_dup 5))
  	      (clobber (match_dup 6))
--- 2945,2952 ----
  (define_expand "movstrsi"
    [(parallel [(set (match_operand:BLK 0 "" "")
  		   (match_operand:BLK 1 "" ""))
! 	      (clobber (match_scratch:SI 7 ""))
! 	      (clobber (match_scratch:SI 8 ""))
  	      (clobber (match_dup 4))
  	      (clobber (match_dup 5))
  	      (clobber (match_dup 6))
***************
*** 3016,3025 ****
  ;; therefore it is forced to operand 2.  If the count is compile-time
  ;; determined, we need two scratch registers for the unrolled code.
  (define_insn "movstrsi_internal"
!   [(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
! 	(mem:BLK (match_operand:SI 1 "register_operand" "+r,r")))
!    (clobber (match_dup 0))
!    (clobber (match_dup 1))
     (clobber (match_operand:SI 2 "register_operand" "=r,r"))	;loop cnt/tmp
     (clobber (match_operand:SI 3 "register_operand" "=&r,&r"))	;item tmp
     (clobber (match_operand:SI 6 "register_operand" "=&r,&r"))	;item tmp2
--- 3016,3025 ----
  ;; therefore it is forced to operand 2.  If the count is compile-time
  ;; determined, we need two scratch registers for the unrolled code.
  (define_insn "movstrsi_internal"
!   [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
! 	(mem:BLK (match_operand:SI 1 "register_operand" "r,r")))
!    (clobber (match_scratch:SI 7 "=0,0")))
!    (clobber (match_scratch:SI 8 "=1,1"))
     (clobber (match_operand:SI 2 "register_operand" "=r,r"))	;loop cnt/tmp
     (clobber (match_operand:SI 3 "register_operand" "=&r,&r"))	;item tmp
     (clobber (match_operand:SI 6 "register_operand" "=&r,&r"))	;item tmp2