ARM: Bug in gcc-3.3 optimizer

[Richard Earnshaw]

> ARM: Bug in gcc-3.3 optimizer
> 
> After a conditional call the old condition code is used
> for setting the return register.
> 
> Happens with -O2 -O1 -Os.
> Does not happen when only turning on lots of -f options.
> 
> I did not find this in the bug-list, so I assume it is new/unfixed.
> 
> Should calls have (clobber (reg:CC CC_REGNUM)) set?
> 
> **********************************************************************
> 
> VMClassLoader::findClass
> 
>    b8864:	e1a00004 	mov	r0, r4
>    b8868:	e8fd85f0 	ldmia	sp!, {r4, r5, r6, r7, r8, sl, pc}^

Note the ^ at the end of the LDM.  It means your compiler is producing 
apcs-26 code.  How did you configure the compiler?

> 
>    b8910:	e3540000 	cmp	r4, #0	; 0x0
>    b8914:	01a0000a 	moveq	r0, sl
>    b8918:	01a01006 	moveq	r1, r6
>    b891c:	0bfff9bc 	bleq	b7014 <URLClassLoader::findClass>
> ; conditions might have changed!!!! r4 unchanged!

APCS-26 code preserved the condition codes over a call, so this is to be 
expected.

>    b8920:	01a04000 	moveq	r4, r0
>    b8924:	eaffffce 	b	b8864
> 

You need to use -mapcs-32, or better still build a compiler configured to 
do that by default.

R.