[Bug target/6526] [SH4] sdivsi3_i4 can clobber xd0/xd2

[joern.rennecke@superh.com]

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6526



------- Additional Comments From joern.rennecke@superh.com  2003-06-03 15:55 -------
Subject: Re:  [SH4] sdivsi3_i4 can clobber xd0/xd2

"marcus@mc.pp.se" wrote:
> Sorry, but this isn't really helpful.  First, the current libgcc
> functions do _not_ use __fpscr_values, so using __set_fpscr won't help
> anyway (as you can see in the test case, which _does_ use __set_fpscr
> but still fails).  Second, I need to use frchg for preformance reasons.

Sorry, I haven't looked at the issue closely enough first.

Having FR set to 1 at the start of a gcc compiled or supplied function
is not supported.  Supporting this would require too much overhead for
no apparent gain.
The patch you provided does not make integer division slower, it also
causes it to give different results when the floating point rounding
mode is changed, or trap when e.g. inexact traps are enabled.

I suggest that you switch to the alternate floating point register bank
to put your matrix there, and then switch back to use the ordinary
floating point registers for generic floating point operations.
	




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