[Bug c/12080] arm-elf-gcc-3.2 generates wrong interrupt code w/o optimizations on

[jamesl at appliedminds dot com]

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12080



------- Additional Comments From jamesl at appliedminds dot com  2003-08-27 23:00 -------
Here's an analysis of the code you posted:


lets say, on entry, sp = 0x1000




        str     ip, [sp, #-4]!


@ ip -> [0xFFC], sp = 0xFFC


        mov     ip, sp


@ ip = 0xFFC


        stmfd   sp!, {r3, fp, ip, lr, pc}


@ r3 -> [0xFF8]


@ fp -> [0xFF4]


@ ip -> [0xFF0]


@ lr -> [0xFEC]


@ pc -> [0xFE8]


@ sp = 0xFE8


        sub     fp, ip, #4


@ fp = 0xFF8


        sub     sp, sp, #4


@ sp = 0xFE4


        mvn     r3, #65280


        sub     r3, r3, #199


        ldr     r3, [r3, #0]


        str     r3, [fp, #-20]


        ldmea   fp, {r3, fp, sp, lr}


@ r3 <- [0xFFC]


@ fp <- [0x1000] (who knows what fp is at this point)


@ sp <- ????


@ lr <- ???? 


        ldmfd   sp!, {ip}


        subs    pc, lr, #4




So looking that that code, it seems horribly broken.


And besides, there is no ^ operator after the ldm** operations, so the CPSR 
never gets restored.


I don't think I want the rest of program executing in IRQ mode.