[Bug c/12080] New: arm-elf-gcc-3.2 generates wrong interrupt code w/o optimizations on

jamesl at appliedminds dot com gcc-bugzilla@gcc.gnu.org
Wed Aug 27 15:21:00 GMT 2003


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12080

           Summary: arm-elf-gcc-3.2 generates wrong interrupt code w/o
                    optimizations on
           Product: gcc
           Version: 3.2
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: c
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: jamesl at appliedminds dot com
                CC: gcc-bugs at gcc dot gnu dot org

arm-elf-gcc-3.2 seems to generate bad interrupt code when compiling w/o any 
optimizations.




Gcc Version:


arm-elf-gcc (GCC) 3.2




Compiling with:


arm-elf-gcc -S -g -I. -mcpu=arm7dmi -Wall -save-temps timer_test.c




yields the following asm code for an interrupt handler:


timer2_int:


.LFB3:


.LM25:


    @ Interrupt Service Routine.


    @ args = 0, pretend = 0, frame = 0


    @ frame_needed = 1, uses_anonymous_args = 0


    str ip, [sp, #-4]!


    mov ip, sp


.LCFI7:


    sub lr, lr, #4


    stmfd   sp!, {r2, r3, fp, ip, lr, pc}


.LCFI8:


    sub fp, ip, #4


.LCFI9:


.LM26:


    mvn r3, #3776


    sub r3, r3, #15


    mov r2, #0


    str r2, [r3, #0]


.LM27:


    ldmea   fp, {r2, r3, fp, ip, pc}^




As you can see, the last line of this is bogus.


It should not be LDMing from fp, but instead from sp.




Compiling with:


arm-elf-gcc -S -g -I. -O2 -mcpu=arm7dmi -Wall -save-temps timer_test.c


fixes the problem:




.LM49:


    @ Interrupt Service Routine.


    @ args = 0, pretend = 0, frame = 0


    @ frame_needed = 0, uses_anonymous_args = 0


    @ link register save eliminated.


    stmfd   sp!, {r2, r3}


.LCFI2:


.LM50:


    mov r2, #0


    mvn r3, #3776


.LM51:


    @ lr needed for prologue


.LM52:


    str r2, [r3, #-15]


    ldmfd   sp!, {r2, r3}    <--- This line is correct here.


    subs    pc, lr, #4



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