gcc port to StarCore

[David Livshin]

( submitted first to gcc@gcc.gnu.org )

Hi,

I am working on the port of the gcc version 3.0.1 to the StarCore
architecture ( DSP from Motorola/Agere ). Compiling ( without
optimizations ):

foo()
 {
  int i;

  switch ( i )
   case 1:
    break;

 }

compiler generates the following pattern:
  ...

(insn 17 32 18 (set (cc0)
        (compare (reg:SI 3 d3 [43])
            (reg:SI 2 d2 [44]))) 63 {cmpsiEXPANDED} (nil)
    (nil))

(jump_insn 18 17 29 (set (pc)
        (if_then_else (eq (cc0)
                (const_int 0 [0x0]))
            (label_ref 21)
            (pc))) 52 {beqEXPANDED} (nil)
    (nil))
;; End of basic block 0, registers live:
 23 [r7] 32 [sp]

;; Start of basic block 1, registers live: 23 [r7] 32 [sp]
  ...

which stays valid till flow analysis ( last seen in ".postpreload" dump ).
In ".flow2" dump the above pattern is transformed into:


(insn 17 32 11 (set (cc0)
        (compare (reg:SI 3 d3 [43])
            (reg:SI 2 d2 [44]))) 63 {cmpsiEXPANDED} (nil)
    (nil))
;; End of basic block 0, registers live:
 23 [r7] 32 [sp]

( jump instruction being deleted ).

Documentation states that "GCC always generates a pair of
consecutive RTL insns, possibly separated by note insns, one to set the
condition code and one to test it, and _keeps the pair inviolate until the
end_."

While handling compare I am calling "next_cc0_usr" which in this case
returned 0; In addition to that I tried "find_reg_note (insn, REG_UNUSED,
cc0_rtx)" but it also failed. 

I checked my implementation of NOTICE_UPDATE_CC and it performed
CC_STATUS_INIT before handling compare ( as required ).

Regards,

David Livshin
dlivshin@internet-zahav.net
Tel:      +972 - 8 - 935 - 4597
Mobile: +972 - 67 - 290 - 998
Laskov 11/31
Rehovot, 76654
Israel

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