GCC-SH: shad problem and memset optimization
Toshi Morita
tm2@best.com
Fri Oct 13 17:22:00 GMT 2000
host: i386-linux
target: sh-elf
version: CVS 10/12/2000
options: -O2 -m4-single-only -ml
When jidctfst.i from stress-1.16 is compiled, the following code is emitted:
1) GCC fails to notice that "shad" doesn't destroy first register, and
reloads it multiple times unnecessarily.
The shad insn appears to be defined like this:
(define_insn "ashrsi3_d"
[(set (match_operand:SI 0 "arith_reg_operand" "=r")
(ashiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
(neg:SI (match_operand:SI 2 "arith_reg_operand" "r"))))]
"TARGET_SH3"
"shad %2,%0"
[(set_attr "type" "dyn_shift")])
I'm wondering if CSE is having trouble with the embedded neg:SI...
_jpeg_idct_ifast:
...
.L66:
...
mov #-5,r1 <- here
shad r0,r6
mov.w .L55,r0
add r2,r6
mov.w .L58,r2
shad r1,r12
sub r7,r6
add r14,r0
mov #-5,r7 <- here
mov.l @(16,r0),r0
and r2,r12
sub r6,r4
mov.b @(r0,r12),r1
add r4,r5
mov.b r1,@r3
mov #-5,r1 <- here
add #7,r3
shad r1,r9
Same function in same file:
2) r1 is unnecessarily zero-extended.
3) addressing modes could be improved
I'm surprised GCC isn't doing this here; I could've sworn
it's done this optimization on other pieces of code.
.L38:
mov #-5,r7
mov.w .L55,r0
mov.w .L58,r8
shad r7,r6
add r14,r0
mov.l @(16,r0),r0
and r8,r6
mov.b @(r0,r6),r1
extu.b r1,r1 add #8,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #1,r3
mov.b r1,@r3 mov.b r1,@-r3
add #7,r3
mov.w .L55,r1
add r14,r1
mov.l @(12,r1),r2
add #32,r2
bra .L31
mov.l r2,@(12,r1)
.align 5
Toshi
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