PATCH 2: Re: BOOTSTRAP FAILURE: segementation fault in genattrtab under hpux
John David Anglin
dave@hiauly1.hia.nrc.ca
Sat Nov 18 11:47:00 GMT 2000
> > The problem is the base and index registers in the ldb instruction
> > have been interchanged by rename registers. These are not interchangeable
> > on the pa because the space register for the instruction is loaded from
> > the base register. Richard and Jeff, any thoughts on how to fix this
> > one?
...
> pa.c::basereg_operand
> /* Once reload has started everything is considered valid. Reload should
> only create indexed addresses using the stack/frame pointer, and any
> others were checked for validity when created by the combine pass.
>
> Also allow any register when TARGET_NO_SPACE_REGS is in effect since
> we don't have to worry about the braindamaged implicit space register
> selection using the basereg only (rather than effective address)
> screwing us over. */
> if (TARGET_NO_SPACE_REGS || reload_in_progress || reload_completed)
> return (GET_CODE (op) == REG);
>
>
> I believe the easiest/best fix is to move REGNO_POINTER_FLAG into the REG
> expression itself, then arrange for basereg_operand to check that flag.
>
> THat would also allow us to clean up other warts in the PA backend.
The enclosed patch fixes the above problem and removes the related warts
in the PA backend. It also includes the return clean up by Richard
Henderson. Tested with a complete bootstrap and check.
Please review for installation.
Dave
--
J. David Anglin dave.anglin@nrc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6605)
2000-11-17 John David Anglin <dave@hiauly1.hia.nrc.ca>
* pa.c (basereg_operands): After reload starts, valid base register
operands must have REGNO_POINTER_FLAG set.
* pa.md: Remove hack from all index insns to reverse the operand
order of frame and stack pointer references incorrectly created
in the reload pass.
From Richard Henderson <rth@redhat.com>
(return): Make a define_expand; use r2.
(epilogue): Don't try trivial return.
--- pa.c.orig Tue Oct 17 22:12:03 2000
+++ pa.c Fri Nov 17 12:30:58 2000
@@ -6148,17 +6148,19 @@
if (!cse_not_expected)
return 0;
- /* Once reload has started everything is considered valid. Reload should
- only create indexed addresses using the stack/frame pointer, and any
- others were checked for validity when created by the combine pass.
-
- Also allow any register when TARGET_NO_SPACE_REGS is in effect since
- we don't have to worry about the braindamaged implicit space register
- selection using the basereg only (rather than effective address)
- screwing us over. */
- if (TARGET_NO_SPACE_REGS || reload_in_progress || reload_completed)
+ /* Allow any register when TARGET_NO_SPACE_REGS is in effect since
+ we don't have to worry about the braindamaged implicit space
+ register selection from the basereg. */
+ if (TARGET_NO_SPACE_REGS)
return (GET_CODE (op) == REG);
+ /* Once reload has started any register with REGNO_POINTER_FLAG set
+ is considered valid. Reload should only create indexed addresses
+ using the stack/frame pointer. All others are checked for
+ validity when they are created by the combine pass. */
+ if (reload_in_progress || reload_completed)
+ return (GET_CODE (op) == REG && REGNO_POINTER_FLAG (REGNO (op)));
+
/* Stack is always OK for indexing. */
if (op == stack_pointer_rtx)
return 1;
@@ -6171,12 +6173,10 @@
/* The only other valid OPs are pseudo registers with
REGNO_POINTER_FLAG set. */
- if (GET_CODE (op) != REG
- || REGNO (op) < FIRST_PSEUDO_REGISTER
- || ! register_operand (op, mode))
- return 0;
-
- return REGNO_POINTER_FLAG (REGNO (op));
+ return (GET_CODE (op) == REG
+ && REGNO (op) >= FIRST_PSEUDO_REGISTER
+ && register_operand (op, mode)
+ && REGNO_POINTER_FLAG (REGNO (op)));
}
/* Return 1 if this operand is anything other than a hard register. */
--- pa.md.orig Tue Oct 17 00:43:58 2000
+++ pa.md Fri Nov 17 12:47:33 2000
@@ -2024,17 +2024,7 @@
(mem:SI (plus:SI (match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r"))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{ldwx|ldw} %1(%2),%0\";
- else
- return \"{ldwx|ldw} %2(%1),%0\";
-}"
+ "{ldwx|ldw} %2(%1),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2043,17 +2033,7 @@
(mem:SI (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r"))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{ldwx|ldw} %2(%1),%0\";
- else
- return \"{ldwx|ldw} %1(%2),%0\";
-}"
+ "{ldwx|ldw} %1(%2),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2474,17 +2454,7 @@
(mem:HI (plus:SI (match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r"))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{ldhx|ldh} %1(%2),%0\";
- else
- return \"{ldhx|ldh} %2(%1),%0\";
-}"
+ "{ldhx|ldh} %2(%1),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2493,17 +2463,7 @@
(mem:HI (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r"))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{ldhx|ldh} %2(%1),%0\";
- else
- return \"{ldhx|ldh} %1(%2),%0\";
-}"
+ "{ldhx|ldh} %1(%2),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2515,17 +2475,7 @@
(match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r")))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{ldhx|ldh} %1(%2),%0\";
- else
- return \"{ldhx|ldh} %2(%1),%0\";
-}"
+ "{ldhx|ldh} %2(%1),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2536,17 +2486,7 @@
(match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r")))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{ldhx|ldh} %2(%1),%0\";
- else
- return \"{ldhx|ldh} %1(%2),%0\";
-}"
+ "{ldhx|ldh} %1(%2),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2636,17 +2576,7 @@
(mem:QI (plus:SI (match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r"))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{ldbx|ldb} %1(%2),%0\";
- else
- return \"{ldbx|ldb} %2(%1),%0\";
-}"
+ "{ldbx|ldb} %2(%1),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2655,17 +2585,7 @@
(mem:QI (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r"))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{ldbx|ldb} %2(%1),%0\";
- else
- return \"{ldbx|ldb} %1(%2),%0\";
-}"
+ "{ldbx|ldb} %1(%2),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2677,17 +2597,7 @@
(match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r")))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{ldbx|ldb} %1(%2),%0\";
- else
- return \"{ldbx|ldb} %2(%1),%0\";
-}"
+ "{ldbx|ldb} %2(%1),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2698,17 +2608,7 @@
(match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r")))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{ldbx|ldb} %2(%1),%0\";
- else
- return \"{ldbx|ldb} %1(%2),%0\";
-}"
+ "{ldbx|ldb} %1(%2),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2719,17 +2619,7 @@
(match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r")))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{ldbx|ldb} %1(%2),%0\";
- else
- return \"{ldbx|ldb} %2(%1),%0\";
-}"
+ "{ldbx|ldb} %2(%1),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -2740,17 +2630,7 @@
(match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r")))))]
"! TARGET_DISABLE_INDEXING"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{ldbx|ldb} %2(%1),%0\";
- else
- return \"{ldbx|ldb} %1(%2),%0\";
-}"
+ "{ldbx|ldb} %1(%2),%0"
[(set_attr "type" "load")
(set_attr "length" "4")])
@@ -3023,17 +2903,7 @@
(mem:DF (plus:SI (match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r"))))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{flddx|fldd} %1(%2),%0\";
- else
- return \"{flddx|fldd} %2(%1),%0\";
-}"
+ "{flddx|fldd} %2(%1),%0"
[(set_attr "type" "fpload")
(set_attr "length" "4")])
@@ -3042,17 +2912,7 @@
(mem:DF (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r"))))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{flddx|fldd} %2(%1),%0\";
- else
- return \"{flddx|fldd} %1(%2),%0\";
-}"
+ "{flddx|fldd} %1(%2),%0"
[(set_attr "type" "fpload")
(set_attr "length" "4")])
@@ -3061,17 +2921,7 @@
(match_operand:SI 2 "register_operand" "r")))
(match_operand:DF 0 "register_operand" "fx"))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{fstdx|fstd} %0,%1(%2)\";
- else
- return \"{fstdx|fstd} %0,%2(%1)\";
-}"
+ "{fstdx|fstd} %0,%2(%1)"
[(set_attr "type" "fpstore")
(set_attr "length" "4")])
@@ -3080,17 +2930,7 @@
(match_operand:SI 2 "basereg_operand" "r")))
(match_operand:DF 0 "register_operand" "fx"))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{fstdx|fstd} %0,%2(%1)\";
- else
- return \"{fstdx|fstd} %0,%1(%2)\";
-}"
+ "{fstdx|fstd} %0,%1(%2)"
[(set_attr "type" "fpstore")
(set_attr "length" "4")])
@@ -3354,17 +3194,7 @@
(mem:SF (plus:SI (match_operand:SI 1 "basereg_operand" "r")
(match_operand:SI 2 "register_operand" "r"))))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{fldwx|fldw} %1(%2),%0\";
- else
- return \"{fldwx|fldw} %2(%1),%0\";
-}"
+ "{fldwx|fldw} %2(%1),%0"
[(set_attr "type" "fpload")
(set_attr "length" "4")])
@@ -3373,17 +3203,7 @@
(mem:SF (plus:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "basereg_operand" "r"))))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{fldwx|fldw} %2(%1),%0\";
- else
- return \"{fldwx|fldw} %1(%2),%0\";
-}"
+ "{fldwx|fldw} %1(%2),%0"
[(set_attr "type" "fpload")
(set_attr "length" "4")])
@@ -3392,17 +3212,7 @@
(match_operand:SI 2 "register_operand" "r")))
(match_operand:SF 0 "register_operand" "fx"))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[2] == hard_frame_pointer_rtx
- || operands[2] == stack_pointer_rtx)
- return \"{fstwx|fstw} %0,%1(%2)\";
- else
- return \"{fstwx|fstw} %0,%2(%1)\";
-}"
+ "{fstwx|fstw} %0,%2(%1)"
[(set_attr "type" "fpstore")
(set_attr "length" "4")])
@@ -3411,17 +3221,7 @@
(match_operand:SI 2 "basereg_operand" "r")))
(match_operand:SF 0 "register_operand" "fx"))]
"! TARGET_DISABLE_INDEXING && ! TARGET_SOFT_FLOAT"
- "*
-{
- /* Reload can create backwards (relative to cse) unscaled index
- address modes when eliminating registers and possibly for
- pseudos that don't get hard registers. Deal with it. */
- if (operands[1] == hard_frame_pointer_rtx
- || operands[1] == stack_pointer_rtx)
- return \"{fstwx|fstw} %0,%2(%1)\";
- else
- return \"{fstwx|fstw} %0,%1(%2)\";
-}"
+ "{fstwx|fstw} %0,%1(%2)"
[(set_attr "type" "fpstore")
(set_attr "length" "4")])
@@ -5546,20 +5346,12 @@
;; Unconditional and other jump instructions.
-(define_insn "return"
- [(return)]
+(define_expand "return"
+ [(parallel [(return)
+ (use (reg:SI 2))])]
"hppa_can_use_return_insn_p ()"
- "*
-{
- if (TARGET_PA_20)
- return \"bve%* (%%r2)\";
- return \"bv%* %%r0(%%r2)\";
-}"
- [(set_attr "type" "branch")
- (set_attr "length" "4")])
+ "")
-;; Use a different pattern for functions which have non-trivial
-;; epilogues so as not to confuse jump and reorg.
(define_insn "return_internal"
[(return)
(use (reg:SI 2))]
@@ -5576,31 +5368,20 @@
(define_expand "prologue"
[(const_int 0)]
""
- "hppa_expand_prologue ();DONE;")
+ "hppa_expand_prologue (); DONE;")
(define_expand "sibcall_epilogue"
[(return)]
""
- "
-{
- hppa_expand_epilogue ();
- DONE;
-}")
+ "hppa_expand_epilogue (); DONE;")
(define_expand "epilogue"
[(return)]
""
"
{
- /* Try to use the trivial return first. Else use the full
- epilogue. */
- if (hppa_can_use_return_insn_p ())
- emit_jump_insn (gen_return ());
- else
- {
- hppa_expand_epilogue ();
- emit_jump_insn (gen_return_internal ());
- }
+ hppa_expand_epilogue ();
+ emit_jump_insn (gen_return_internal ());
DONE;
}")
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