Inline Assembly Register Allocation Bug? (Was: Possible bugwithgcc 2.95.2 on Hitachi h8)

[Bernd Schmidt]

On Tue, 18 Jul 2000, Ross Crawford wrote:

> >>   asm volatile ("movl\t(%1),%0\n\t"
> >> 		"movl\t(%1),%0"
> >> 		: "=r" (temp) : "r" (p));
> >
> >This is not a bug.  You need to tell gcc that operand 0 is earlyclobbered:
> >
> >  asm volatile ("movl\t(%1),%0\n\t"
> >		"movl\t(%1),%0"
> >		: "=&r" (temp) : "r" (p));
> >
> >Bernd
> 
> Does this imply a bug in egcs 1.1.2 (it should have produced the same

No.  It's not guaranteed that it will use the same register if you
omit the earlyclobber.

Bernd