i386 assembler issue?

[Jan Hubicka]

> On Fri, 28 Apr 2000, Alan Modra wrote: [about two byte opcode single shift
> instructions]
> 
> > 586, and I assume that's the case for more recent processors too.  I'm not
> > against re-enabling this code, since 486 is getting fairly old, but I'd
I am not aware of any slowdowns in the shorter form of instructions
on other CPUs... Maybe K6 can be issue, I can verify this.
> 
> On second thoughts, it probably makes sense for gcc to choose the smaller
> instruction, as gcc has info about the architecture that gas doesn't have.
> ie. gcc can choose to emit "sar %eax" instead of "sar %eax,1" on anything
> but 486.

Thats true. Is there any way to encode these instructions differently in GAS?
At least this ought to be win for -Os
> 
> The only thing I found in the Intel optimisation manual regarding shifts
> is:
> 
> "For the best blended code, replace the shift instruction with two or more
> add instructions, since the short latency of this instruction may not be
> maintained across all implementations."
> 
> And gcc seems to follow this advice.
Yes, gcc use add on most cpus:
const int x86_double_with_add = ~m_386;

Honza