Scheduler bug on the ARM

Jeffrey A Law law@upchuck.cygnus.com
Mon May 24 00:49:00 GMT 1999


  In message <199904131602.RAA18028@sun52.NIS.cambridge>you write:
  > This is a multipart MIME message.
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  > 
  > The test case below is currently causing the scheduler to blow up during a 
  > build of libio for the arm-semi-aout configuration.
  > 
  > Arguments:
  > 	cc1plus -O2 -fno-implicit-templates fstream.ii
  > 
  > I haven't been able to work out exactly what is failing, except that 
  > q_size is non-zero at the end of a basic block.  The sched2 dump shows 
  > that somehow it is getting its insn links messed up:
  > 
  > ;;       -- basic block number 1 from 407 to 12 --
  > ;; ready list initially:
  > ;; 12
  > 
  > ;; insn[ 296]: priority =   23, ref_count =    1
  > ;; insn[ 127]: priority =   23, ref_count =    1
  > ;; insn[ 350]: priority =    1, ref_count =    1
  > ;; insn[  11]: priority =   27, ref_count =    2
  > ;; insn[  12]: priority = 2147483533, ref_count =    0
  > ;; ready list at T-1: 12 (7fffff8d), now 12
  > ;; ready list at T-2: 127 (17) 11 (1b), now 11 127
  > ;; ready list at T-3: 127 (17), now 127
  > ;; launching 350 before 127 with no stalls at T-4
  > ;; ready list at T-4: 296 (17) 350 (1), now 296 350
  > ;; ready list at T-5: 350 (1) 294 (17), now 294 350
  > 
  > Insn 294 (mentioned in the last ready-list) isn't even a member of block 1 
  > (it's the final insn in block 0).  Another odd thing is that at some point 
  > it queues a(nother) insn from block 0.
Must have been something totally hokey going on.

I just tried this with the current gcc-2.95 CVS tree and it looks a lot more
sane:

;;       -- basic block number 0 from 305 to 12 --
;; ready list initially:
;; 12

;; insn[ 411]: priority =    1, ref_count =    3
;; insn[ 412]: priority =    1, ref_count =    9
;; insn[ 413]: priority =   11, ref_count =    7
;; insn[ 414]: priority =   14, ref_count =    6
;; insn[ 415]: priority =   17, ref_count =    5
;; insn[ 416]: priority =   20, ref_count =    5
;; insn[ 418]: priority =    1, ref_count =    3
;; insn[ 420]: priority =   23, ref_count =    2
;; insn[ 421]: priority =   23, ref_count =    3
;; insn[   5]: priority =   23, ref_count =    1
;; insn[   7]: priority =   23, ref_count =    2
;; insn[ 294]: priority =   23, ref_count =    7
;; insn[ 296]: priority =   23, ref_count =    1
;; insn[ 302]: priority =   27, ref_count =    2
;; insn[ 127]: priority =   27, ref_count =    1
;; insn[ 350]: priority =   23, ref_count =    1
;; insn[  11]: priority =   27, ref_count =    2
;; insn[  12]: priority = 2147483533, ref_count =    0
;; ready list at T-1: 12 (7fffff8d), now 12
;; ready list at T-2: 127 (1b) 11 (1b), now 11 127
;; ready list at T-3: 127 (1b), now 127
;; launching 350 before 127 with no stalls at T-4
;; ready list at T-4: 302 (1b) 350 (17), now 302 350
;; ready list at T-5: 350 (17), now 350
;; launching 296 before 350 with 3 stalls at T-6
;; ready list at T-9: 296 (17)
;; blocking insn 296 for 1 cycles
;; launching 296 before 350 with no stalls at T-10
;; ready list at T-10: 296 (17), now 296
;; ready list at T-11: 294 (17), now 294
;; ready list at T-12: 7 (17) 5 (17)
;; blocking insn 7 for 4 cycles
;; blocking insn 5 for 4 cycles
;; launching 5 before 294 with 3 stalls at T-13
;; launching 7 before 294 with 3 stalls at T-13
;; ready list at T-16: 5 (17) 7 (17), now 7 5
;; ready list at T-17: 5 (17)
;; blocking insn 5 for 2 cycles
;; launching 5 before 7 with 1 stalls at T-18
;; ready list at T-19: 5 (17), now 5
;; ready list at T-20: 418 (1) 421 (17), now 421 418
;; ready list at T-21: 418 (1) 420 (17), now 420 418
;; ready list at T-22: 418 (1), now 418
;; launching 416 before 418 with 2 stalls at T-23
;; ready list at T-25: 416 (14), now 416
;; launching 415 before 416 with 3 stalls at T-26
;; ready list at T-29: 415 (11), now 415
;; launching 414 before 415 with 3 stalls at T-30
;; ready list at T-33: 414 (e), now 414
;; launching 413 before 414 with 3 stalls at T-34
;; ready list at T-37: 413 (b), now 413
;; launching 412 before 413 with 10 stalls at T-38
;; ready list at T-48: 412 (1), now 412
;; ready list at T-49: 411 (1), now 411
;; total time = 49
;; new basic block head = 305
;; new basic block end = 12


I wonder if somehow your cfg got messed up and the prologue ended up in the
wrong place.  If it's still failing you might enable checking since that does
some sanity checking of the cfg's data structures.



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