gcc-2.95 19990602 (prerelease) on alpha-dec-osf4.0d

[Kaveh R. Ghazi]

 > From: Jeffrey A Law <law@cygnus.com>
 >  
 >   In message < 199906042335.SAA78327@latour.rsch.comm.mot.com >you
 >   write:
 >   > I see the same problem as Kaveh reported.  Since processor type
 >   was
 >   > a concern, here some more information:
 >   > 
 >   > S rittle@ebola; psrinfo -v
 >   > Status of processor 0 as of: 06/04/99 18:22:28
 >   >   Processor has been on-line since 02/21/1999 13:15:40
 >   >   The alpha EV5.6 (21164A) processor operates at 400 MHz,
 >   >         and has an alpha internal floating point processor.
 >   > 
 >   > However, note that I explicitly told configure not to use the ev56
 >   > instruction set...
 >   > 
 >   > stage1/xgcc -Bstage1/ -B/usr/local/alpha-dec-osf4.0d/bin/ -c
 >   -DIN_GCC -DHA
 >   > IFA    -g -O2  -DHAVE_CONFIG_H    -I. -I../../egcs/gcc
 >   -I../../egcs/gcc/con
 >   > fig -I../../egcs/gcc/../include ../../egcs/gcc/gcov.c
 >   > ../../egcs/gcc/gcov.c: In function `output_data':
 >   > ../../egcs/gcc/gcov.c:1403: fixed or forbidden register 32 ($f0)
 >   was spille
 >   > d for class FLOAT_REGS.
 >   > ../../egcs/gcc/gcov.c:1403: This may be due to a compiler bug or
 >   to impossi
 >   > ble asm
 >   > ../../egcs/gcc/gcov.c:1403: statements or clauses.
 >   > ../../egcs/gcc/gcov.c:1403: This is the instruction:
 >   > (insn 2638 2634 18 (set (reg:DF 398)
 >   >         (mem/u:DF (reg:DI 384) 0)) 279 {movsf-2} (insn_list 2632
 >   (nil))
 >   >     (expr_list:REG_EQUIV (const_double:DF (mem/u:DF
 >   (symbol_ref/u:DI ("*$LC
 >   > 28")) 0) 4636737291354636288 [0x4059000000000000] 0 [0x0] [100])
 >   >         (nil)))
 > 
 > I believe rth's most recent fix (which I just checked in) should fix
 > this problem.
 > jeff

	Yup. :-)

I was able to bootstrap the 2.95 snapshot (+ his patch) last night.
Thanks Richard.

--
Kaveh R. Ghazi			Engagement Manager / Project Services
ghazi@caip.rutgers.edu		Qwest Internet Solutions