m68k: volatile pointer ref generates bad code

Miriam Brod mjb@virata.com
Mon Jan 25 06:49:00 GMT 1999


On Mon, 11 Jan 1999, Mark Powell wrote:

> I couldn't see this reported before so here goes....
> 
> The following bug was observed in egcs-1.1b and egcs-1.1.1 configured
> for m68k-coff.
> 
> Assignment operations through a pointer variable declared volatile
> produce multiple accesses. This can cause incorrect behaviour when the
> destination of the write is a register in a peripheral device and the
> device expects a series of values to be written to the same address.
> 
> The bug is triggered when compiling with no optimisation. Optimisation
> levels of -O1 and above do not exhibit the bug.


We have seen a similar problem when compiling ARM code with egcs-1.1b.

With optimisation disabled (compiler option -O0), source of form:

  *(volatile U32*) (address)  =  (value);

generates an assembler code fragment like the following:

  adr r0, (address)  ; Get address in r0
  ldr r1, (value)    ; Get value in r1
  str r1, [r0]       ; Write value to address
  ldr r1, [r0]       ; *** Read back address
  str r1, [r0]       ; *** Write read-value to address

The final two instructions are redundent and appear to be inserted by
the compiler as a result of the "volatile" keyword.  This causes incorrect
behaviour for hardware registers which behave differently on read and write.


-- Miriam Brod
-------------------------------------------------------------------
Miriam Brod (Dr)                           Email: mbrod@virata.com
Virata Limited                             Phone: 01223 566919
                                           Fax:   01223 566915



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