egcs-990330 (arm-elf) unrecognisable insn

[Richard Earnshaw]

> 
> 
>   In message < 199904091318.OAA16006@sun52.NIS.cambridge >you write:
>   > > The problem starts in arm.c:arm_reload_in_hi() where it is being
>   > > called with:
>   > > 
>   > > 	operands[0] = (reg:HI 1)
>   > > 	operands[1] = (subreg:HI (reg:DI: 53))
>   > > 	operands[2] = (reg:SI 1)
>   > 
>   > Actually, I think the problem lies somewhere in emit_reload_insns, since I 
>   > think operands[1] shouldn't be a subreg of a pseudo by this stage (at 
>   > least, not in this case).  I seem to remember that in cases like this in 
>   > 1.1.x operands[1] was a MEM by this point.
> Hmmm, actually I think a subreg of a pseudo can still be hanging around at
> this point. 

The alpha port seems to suggest similarly; I don't understand why, 
especially since the memory replacement must be available (or we couldn't 
look it up).  Since every back-end would have to do this, I fail to see 
why this isn't done in reload.c before calling the machine specific part.  
Why would different machines want to do this lookup differently?

> Kenner claimed it could happen, though I don't remember all the
> details.  The result was a hunk of code like this in the PA backend's reload_XX
> expanders (pa.c::emit_move_sequence):
> 
>   if (scratch_reg
>       && reload_in_progress && GET_CODE (operand0) == REG
>       && REGNO (operand0) >= FIRST_PSEUDO_REGISTER)
>     operand0 = reg_equiv_mem[REGNO (operand0)];
>   else if (scratch_reg
>            && reload_in_progress && GET_CODE (operand0) == SUBREG
>            && GET_CODE (SUBREG_REG (operand0)) == REG
>            && REGNO (SUBREG_REG (operand0)) >= FIRST_PSEUDO_REGISTER)
>     {
>       SUBREG_REG (operand0) = reg_equiv_mem[REGNO (SUBREG_REG (operand0))];
>       operand0 = alter_subreg (operand0);
>     }
> 
>   if (scratch_reg
>       && reload_in_progress && GET_CODE (operand1) == REG
>       && REGNO (operand1) >= FIRST_PSEUDO_REGISTER)
>     operand1 = reg_equiv_mem[REGNO (operand1)];
>   else if (scratch_reg
>            && reload_in_progress && GET_CODE (operand1) == SUBREG
>            && GET_CODE (SUBREG_REG (operand1)) == REG
>            && REGNO (SUBREG_REG (operand1)) >= FIRST_PSEUDO_REGISTER)
>     {
>       SUBREG_REG (operand1) = reg_equiv_mem[REGNO (SUBREG_REG (operand1))];
>       operand1 = alter_subreg (operand1);
>     }

I think this is similar in intent, but different in implementation to the 
the alpha code.

> 
> Then we have a hunk of code to look up any replacements for a MEM:
> 
>   if (scratch_reg && reload_in_progress && GET_CODE (operand0) == MEM
>       && ((tem = find_replacement (&XEXP (operand0, 0)))
>           != XEXP (operand0, 0)))
>     operand0 = gen_rtx_MEM (GET_MODE (operand0), tem);
>   if (scratch_reg && reload_in_progress && GET_CODE (operand1) == MEM
>       && ((tem = find_replacement (&XEXP (operand1, 0)))
>           != XEXP (operand1, 0)))
>     operand1 = gen_rtx_MEM (GET_MODE (operand1), tem);
> 
> 
> It sounds like your problem is slightly different (since reg_equiv_mem is
> NULL), but there may be tidbits you can use.  In a pinch I might be able to
> dig out some mail on these two changes.

Another reason why I think reload is passing the wrong value in is that if 
we step up into emit_reload_insns and print the insn in question, it 
already contains the replacement.  If it can be done for the real insn, 
why isn't it being done for the arguments passed to gen_reload_inhi?

Breakpoint 1, arm_reload_in_hi (operands=0xefff0948)
    at ../../../../gnusrc/egcs/gcc/config/arm/arm.c:3606
3606      rtx base = find_replacement (&XEXP (operands[1], 0));
(gdb) up
#1  0x152638 in gen_reload_inhi (operand0=0x6717a0, operand1=0x44a988, 
    operand2=0x671790) at insn-emit.c:2710
2710      arm_reload_in_hi (operands);
(gdb) 
#2  0x11fb48 in emit_reload_insns (chain=0x5f4c30)
    at ../../../../gnusrc/egcs/gcc/reload1.c:6964
6964                              emit_insn (GEN_FCN (icode) (reloadreg, 
real_oldequiv,
(gdb) print insn
$1 = (struct rtx_def *) 0x44a9a8
(gdb) call debug_rtx(insn)
(insn 5655 14017 5656 (set (reg:HI 3 r3)
        (mem:HI (plus:SI (reg:SI 11 fp)
                (const_int -140 [0xffffff74])) 0)) 197 {*movhi_bytes} (nil)
    (nil))

(gdb) call debug_rtx(real_oldequiv)

(subreg:HI (reg/v:DI 53) 0)

Finally, if I run this code through egcs-1.1.2, the operand is passed in 
as a mem:

Breakpoint 1, arm_reload_in_hi (operands=0xeffea990)
    at ../../../../gnusrc/egcs-1.1/gcc/config/arm/arm.c:3319
3319      rtx base = find_replacement (&XEXP (operands[1], 0));
(gdb) print operands[1]
$1 = (struct rtx_def *) 0x546950
(gdb) call debug_rtx( operands[1])
(mem:HI (plus:SI (reg:SI 11 fp)
        (const_int -124)))
(gdb) up
#1  0x163c08 in gen_reload_inhi (operand0=0x546980, operand1=0x546950, 
    operand2=0x5444b0) at insn-emit.c:2702
2702      arm_reload_in_hi (operands);
(gdb) 
#2  0x12da8c in emit_reload_insns (insn=0x403788)
    at ../../../../gnusrc/egcs-1.1/gcc/reload1.c:6655
(gdb) call debug_rtx(insn)

(insn:QI 5850 13839 5851 (set (reg:HI 3 r3)
        (mem:HI (plus:SI (reg:SI 11 fp)
                (const_int -124)))) 197 {*movhi_bytes} (nil)
    (nil))

So the behaviour in this case has been changed, probably during the reload 
rewrites.

I've included the source to the test case below.


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