reload problem
Jeffrey A Law
law@cygnus.com
Sun Nov 1 02:40:00 GMT 1998
I'm not sure what code is to blame -- I'm tired and having trouble
concentrating. Bernd -- could you look at this -- I'll probably have to
spend tomorrow on egcs-1.1.1 issues, then I'm on a plane first thing Monday
morning.
Thanks.....
(insn 512 167 170 (set (reg/v:SI 29)
(reg:SI 108)) 54 {movsi+2} (nil)
(nil))
(insn 170 512 172 (parallel[
(set (reg/v:SI 29)
(unspec:SI[
(mem:BLK (reg/v:SI 29) 0)
(const_int 4)
(reg:SI 60)
] 0))
(clobber (reg:SI 60))
] ) 390 {strlensi_unroll5} (nil)
(nil))
(insn 172 534 177 (set (reg/v:SI 29)
(minus:SI (reg/v:SI 29)
(reg:SI 108))) 157 {subsi3+1} (insn_list 170 (nil))
(nil))
Neither reg29 nor reg108 will get a hard register.
For insn 512 we have the following reloads:
Reload 0: reload_out (SI) = (reg/v:SI 29)
GENERAL_REGS, RELOAD_FOR_OUTPUT (opnum = 0), optional
reload_out_reg: (reg/v:SI 29)
Reload 1: reload_in (SI) = (reg:SI 108)
GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg:SI 108)
reload_reg_rtx: (reg:SI 5 %edi)
After finishing emit_reload_insns for insn 512 we have the following:
(insn 531 167 512 (set (reg:SI 5 %edi)
(reg:SI 108)) -1 (nil)
(nil))
(insn 512 531 170 (set (reg/v:SI 29)
(reg:SI 108)) 54 {movsi+2} (nil)
(nil))
(insn 170 512 172 (parallel[
(set (reg/v:SI 29)
(unspec:SI[
(mem:BLK (reg/v:SI 29) 0)
(const_int 4)
(reg:SI 60)
] 0))
(clobber (reg:SI 60))
] ) 390 {strlensi_unroll5} (nil)
(nil))
(insn 172 534 177 (set (reg/v:SI 29)
(minus:SI (reg/v:SI 29)
(reg:SI 108))) 157 {subsi3+1} (insn_list 170 (nil))
(nil))
At entry to emit_reload_insns for insn 170 we have:
(insn 531 167 512 (set (reg:SI 5 %edi)
(reg:SI 108)) -1 (nil)
(nil))
(insn 512 531 170 (set (reg/v:SI 29)
(reg:SI 5 %edi)) 54 {movsi+2} (nil)
(nil))
(insn 170 512 172 (parallel[
(set (reg/v:SI 29)
(unspec:SI[
(mem:BLK (reg/v:SI 29) 0)
(const_int 4)
(reg:SI 60)
] 0))
(clobber (reg:SI 60))
] ) 390 {strlensi_unroll5} (nil)
(nil))
(insn 172 534 177 (set (reg/v:SI 29)
(minus:SI (reg/v:SI 29)
(reg:SI 108))) 157 {subsi3+1} (insn_list 170 (nil))
(nil))
And the following reload for insn 170:
Reload 0: reload_in (SI) = (reg/v:SI 29)
reload_out (SI) = (reg/v:SI 29)
INDEX_REGS, RELOAD_OTHER (opnum = 0)
reload_in_reg: (reg/v:SI 29)
reload_out_reg: (reg/v:SI 29)
reload_reg_rtx: (reg:SI 1 %edx)
Reload 1: reload_in (SI) = (reg:SI 60)
reload_out (SI) = (reg:SI 60)
Q_REGS, RELOAD_OTHER (opnum = 2)
reload_in_reg: (reg:SI 60)
reload_out_reg: (reg:SI 60)
reload_reg_rtx: (reg:SI 0 %eax)
After we exit emit_reload_insns for insn 170 we have:
(insn 531 167 512 (set (reg:SI 5 %edi)
(reg:SI 108)) -1 (nil)
(nil))
(insn 512 531 537 (set (reg:SI 1 %edx)
(reg:SI 5 %edi)) 54 {movsi+2} (nil)
(nil))
(insn 537 512 170 (set (reg:SI 0 %eax)
(reg:SI 60)) -1 (nil)
(nil))
(insn 170 537 534 (parallel[
(set (reg/v:SI 29)
(unspec:SI[
(mem:BLK (reg/v:SI 29) 0)
(const_int 4)
(reg:SI 60)
] 0))
(clobber (reg:SI 60))
] ) 390 {strlensi_unroll5} (nil)
(nil))
(insn 534 170 172 (set (reg/v:SI 29)
(reg:SI 1 %edx)) -1 (nil)
(nil))
(insn 172 534 177 (set (reg/v:SI 29)
(minus:SI (reg/v:SI 29)
(reg:SI 108))) 157 {subsi3+1} (insn_list 170 (nil))
So, we're still OK at this point (noting that reg29 in insn 170 will be
turned into %edx by subst_reloads.
Then we call emit_reload_insns for insn 172 which has the following reloads:
Reload 0: reload_in (SI) = (reg/v:SI 29)
reload_out (SI) = (reg/v:SI 29)
GENERAL_REGS, RELOAD_OTHER (opnum = 0), optional
reload_in_reg: (reg/v:SI 29)
reload_out_reg: (reg/v:SI 29)
reload_reg_rtx: (reg:SI 1 %edx)
Reload 1: reload_in (SI) = (reg:SI 108)
GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 2)
reload_in_reg: (reg:SI 108)
reload_reg_rtx: (reg:SI 5 %edi)
During emit_reload_insns for insn 172, we end up deleting insn 512 and
insn 534.
Deletion of insn 512 causes insn 170 to read from an uninitialized register
and we lose.
Here's the testcase. Compile with the current CVS sources -O2 to get it
to fail.
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&!>?<L0``
`
end
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