PATCH to rs6000.md, comments?

Franz Sirl Franz.Sirl-kernel@lauterbach.com
Thu Jul 16 15:26:00 GMT 1998


At 17:32 16.07.98 , Richard Henderson wrote:
>On Thu, Jul 16, 1998 at 02:40:17AM -0700, David S. Miller wrote:
>>    David, one question, there are 2 or 3 constructs like the ones
>>    below in rs6000.c, should I return 1 for CONSTANT_P_RTX in both
>>    cases?
>> 
>> Yes, if it allows CONST_INT in any case then change it to allow
>> CONSTANT_P_RTX in all cases as well.
>
>Well, no.  It should only match CONSTANT_P_RTX where it would
>also match (const_int 0) or (const_int 1).
>
>So the non_logical_cint_operand should not match.

Does this one look ok to you?

Index: rs6000.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.27
diff -u -p -r1.27 rs6000.c
--- rs6000.c	1998/07/02 11:53:21	1.27
+++ rs6000.c	1998/07/16 18:03:57
@@ -473,6 +473,9 @@ short_cint_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   return (GET_CODE (op) == CONST_INT
 	  && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000);
 }
@@ -484,6 +487,9 @@ u_short_cint_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   return (GET_CODE (op) == CONST_INT
 	  && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0);
 }
@@ -495,6 +501,9 @@ non_short_cint_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 0;
+
   return (GET_CODE (op) == CONST_INT
 	  && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000);
 }
@@ -547,6 +556,9 @@ reg_or_neg_short_operand (op, mode)
       register rtx op;
       enum machine_mode mode;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   if (GET_CODE (op) == CONST_INT)
     return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
 
@@ -561,6 +573,9 @@ reg_or_u_short_operand (op, mode)
      register rtx op;
      enum machine_mode mode;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   if (GET_CODE (op) == CONST_INT
       && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0)
     return 1;
@@ -576,7 +591,10 @@ reg_or_cint_operand (op, mode)
     register rtx op;
     enum machine_mode mode;
 {
-     return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
+  return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
 }
 
 /* Return 1 if the operand is an operand that can be loaded via the GOT */
@@ -844,6 +862,9 @@ non_add_cint_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 0;
+
   return (GET_CODE (op) == CONST_INT
 	  && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000
 	  && (INTVAL (op) & 0xffff) != 0);
@@ -857,6 +878,9 @@ logical_operand (op, mode)
      register rtx op;
      enum machine_mode mode;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   return (gpc_reg_operand (op, mode)
 	  || (GET_CODE (op) == CONST_INT
 	      && ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0
@@ -871,6 +895,9 @@ non_logical_cint_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 0;
+
   return (GET_CODE (op) == CONST_INT
 	  && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0
 	  && (INTVAL (op) & 0xffff) != 0);
@@ -908,6 +935,9 @@ mask_operand (op, mode)
      register rtx op;
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
 }
 
@@ -921,6 +951,9 @@ mask64_operand (op, mode)
      register rtx op;
      enum machine_mode mode;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   if (GET_CODE (op) == CONST_INT)
     {
       HOST_WIDE_INT c = INTVAL (op);
@@ -1082,6 +1115,9 @@ input_operand (op, mode)
      register rtx op;
      enum machine_mode mode;
 {
+  if (GET_CODE (op) == CONSTANT_P_RTX)
+    return 1;
+
   /* Memory is always valid.  */
   if (memory_operand (op, mode))
     return 1;
Index: rs6000.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.19
diff -u -p -r1.19 rs6000.h
--- rs6000.h	1998/07/02 11:53:22	1.19
+++ rs6000.h	1998/07/16 18:04:14
@@ -3109,15 +3109,19 @@ do {									\
 /* Define the codes that are matched by predicates in rs6000.c.  */
 
 #define PREDICATE_CODES						\
-  {"short_cint_operand", {CONST_INT}},				\
-  {"u_short_cint_operand", {CONST_INT}},			\
-  {"non_short_cint_operand", {CONST_INT}},			\
+  {"short_cint_operand", {CONST_INT, CONSTANT_P_RTX}},		\
+  {"u_short_cint_operand", {CONST_INT, CONSTANT_P_RTX}},	\
+  {"non_short_cint_operand", {CONST_INT, CONSTANT_P_RTX}},	\
   {"gpc_reg_operand", {SUBREG, REG}},				\
   {"cc_reg_operand", {SUBREG, REG}},				\
-  {"reg_or_short_operand", {SUBREG, REG, CONST_INT}},		\
-  {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}},	\
-  {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}},		\
-  {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}},		\
+  {"reg_or_short_operand", {SUBREG, REG, CONST_INT,		\
+			    CONSTANT_P_RTX}},			\
+  {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT,		\
+				CONSTANT_P_RTX}},		\
+  {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT,		\
+			      CONSTANT_P_RTX}},			\
+  {"reg_or_cint_operand", {SUBREG, REG, CONST_INT,		\
+			   CONSTANT_P_RTX}},			\
   {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}},		\
   {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}},		\
   {"easy_fp_constant", {CONST_DOUBLE}},				\
@@ -3126,19 +3130,21 @@ do {									\
   {"volatile_mem_operand", {MEM}},				\
   {"offsettable_addr_operand", {REG, SUBREG, PLUS}},		\
   {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}},	\
-  {"add_operand", {SUBREG, REG, CONST_INT}},			\
-  {"non_add_cint_operand", {CONST_INT}},			\
-  {"and_operand", {SUBREG, REG, CONST_INT}},			\
-  {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}},	\
-  {"logical_operand", {SUBREG, REG, CONST_INT}},		\
-  {"non_logical_cint_operand", {CONST_INT}},			\
-  {"mask_operand", {CONST_INT}},				\
-  {"mask64_operand", {CONST_INT, CONST_DOUBLE}},		\
+  {"add_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}},	\
+  {"non_add_cint_operand", {CONST_INT, CONSTANT_P_RTX}},	\
+  {"and_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}},	\
+  {"and64_operand", {SUBREG, REG, CONST_INT,			\
+		     CONSTANT_P_RTX, CONST_DOUBLE}},		\
+  {"logical_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}},\
+  {"non_logical_cint_operand", {CONST_INT, CONSTANT_P_RTX}},	\
+  {"mask_operand", {CONST_INT, CONSTANT_P_RTX}},		\
+  {"mask64_operand", {CONST_INT, CONSTANT_P_RTX, CONST_DOUBLE}},\
   {"count_register_operand", {REG}},				\
   {"fpmem_operand", {REG}},					\
   {"call_operand", {SYMBOL_REF, REG}},				\
   {"current_file_function_operand", {SYMBOL_REF}},		\
-  {"input_operand", {SUBREG, MEM, REG, CONST_INT, CONST_DOUBLE,
SYMBOL_REF}}, \
+  {"input_operand", {SUBREG, MEM, REG, CONST_INT,		\
+		     CONSTANT_P_RTX, CONST_DOUBLE, SYMBOL_REF}},\
   {"load_multiple_operation", {PARALLEL}},			\
   {"store_multiple_operation", {PARALLEL}},			\
   {"branch_comparison_operator", {EQ, NE, LE, LT, GE,		\


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