egcs-2.91.16 980328: gcc -O2 gets fatal signal 6 on regex.c
Ulrich Drepper
drepper@cygnus.com
Sat Apr 4 02:24:00 GMT 1998
Jim Wilson <wilson@cygnus.com> writes:
> Thu Apr 2 18:00:52 1998 Jim Wilson <wilson@cygnus.com>
>
> * i386.md (movqi+1): Change alternative 1 from *r/r to *r/*rn.
The patch does the job. Thanks, Jim.
Beside this, I've currently applied the following patch in my tree
(mostly based on Richard's work). The patched gcc can compile glibc
and it does not generate tons of illegal symbols. Plus, the ffs patch
generates better code.
The patch to the specs file generation is necessary though not yet
perfect (it does not regenerate the symbols for the default
architecture, e.g., for a gcc compiled for i686 it should define
__i686__). I'll look at this tomorrow. What is contained below is
nevertheless necessary.
-- Uli
---------------. drepper at gnu.org ,-. 1325 Chesapeake Terrace
Ulrich Drepper \ ,-------------------' \ Sunnyvale, CA 94089 USA
Cygnus Solutions `--' drepper at cygnus.com `------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Index: config/i386/i386.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/i386/i386.c,v
retrieving revision 1.16
diff -u -r1.16 i386.c
--- i386.c 1998/03/12 12:43:41 1.16
+++ i386.c 1998/04/03 05:32:01
@@ -1911,7 +1911,7 @@
if (pic_label_rtx == 0)
{
pic_label_rtx = gen_label_rtx ();
- sprintf (pic_label_name, "LPR%d", pic_label_no++);
+ ASM_GENERATE_INTERNAL_LABEL (pic_label_name, "LPR", pic_label_no++);
LABEL_NAME (pic_label_rtx) = pic_label_name;
}
@@ -1966,7 +1966,7 @@
if (pic_label_rtx == 0)
{
pic_label_rtx = gen_label_rtx ();
- sprintf (pic_label_name, "LPR%d", pic_label_no++);
+ ASM_GENERATE_INTERNAL_LABEL (pic_label_name, "LPR", pic_label_no++);
LABEL_NAME (pic_label_rtx) = pic_label_name;
}
@@ -1984,7 +1984,7 @@
}
else
{
- output_asm_insn (AS1 (call,%P1), xops);
+ output_asm_insn (AS1 (call,%X1), xops);
output_asm_insn ("addl $_GLOBAL_OFFSET_TABLE_,%0", xops);
pic_label_rtx = 0;
}
@@ -2979,7 +2979,9 @@
assemble_name (asm_out_file, buf);
}
- if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
+ if (code == 'X')
+ /* No suffix, dammit. */;
+ else if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
fprintf (file, "@GOTOFF(%%ebx)");
else if (code == 'P')
fprintf (file, "@PLT");
@@ -3272,6 +3274,7 @@
case 'h':
case 'y':
case 'P':
+ case 'X':
break;
case 'J':
@@ -3550,7 +3553,7 @@
/* Set the cc_status for the results of an insn whose pattern is EXP.
On the 80386, we assume that only test and compare insns, as well
- as SI, HI, & DI mode ADD, SUB, NEG, AND, IOR, XOR, ASHIFT,
+ as SI, HI, & DI mode ADD, SUB, NEG, AND, IOR, XOR, FFS, ASHIFT,
ASHIFTRT, and LSHIFTRT instructions set the condition codes usefully.
Also, we assume that jumps, moves and sCOND don't affect the condition
codes. All else clobbers the condition codes, by assumption.
@@ -3644,7 +3647,17 @@
cc_status.flags = CC_NO_OVERFLOW;
cc_status.value1 = SET_SRC (exp);
cc_status.value2 = SET_DEST (exp);
- break;
+ break;
+
+ case UNSPEC:
+ /* This is the FFS primitive. */
+ if (XINT(SET_SRC (exp), 1) == 5)
+ {
+ cc_status.flags = CC_NO_OVERFLOW;
+ cc_status.value1 = XVECEXP(SET_SRC (exp), 0, 0);
+ break;
+ }
+ /* FALLTHROUGH */
default:
CC_STATUS_INIT;
Index: config/i386/i386.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/i386/i386.h,v
retrieving revision 1.15
diff -u -r1.15 i386.h
--- i386.h 1998/03/16 11:56:20 1.15
+++ i386.h 1998/04/03 05:32:01
@@ -304,36 +304,30 @@
%{mpentiumpro:-mcpu=pentiumpro}}"
#endif
-#ifndef CPP_CPU_SPEC
-#ifdef __STDC__
+#ifndef CPP_CPU_DEFAULT_SPEC
#if TARGET_CPU_DEFAULT == 1
-#define CPP_CPU_DEFAULT "-Di486"
+#define CPP_CPU_DEFAULT_SPEC "-Di486"
#else
#if TARGET_CPU_DEFAULT == 2
-#define CPP_CPU_DEFAULT "-Di586"
+#define CPP_CPU_DEFAULT_SPEC "-Di586"
#else
#if TARGET_CPU_DEFAULT == 3
-#define CPP_CPU_DEFAULT "-Di686"
+#define CPP_CPU_DEFAULT_SPEC "-Di686"
#else
-#define CPP_CPU_DEFAULT ""
+#define CPP_CPU_DEFAULT_SPEC ""
#endif
#endif
-#endif /* TARGET_CPU_DEFAULT */
-
-#define CPP_CPU_SPEC "\
--Di386 " CPP_CPU_DEFAULT " -Asystem(unix) -Acpu(i386) -Amachine(i386) \
-%{mcpu=i486:-Di486} %{m486:-Di486} \
-%{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
-%{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
+#endif
+#endif /* CPP_CPU_DEFAULT_SPEC */
-#else
+#ifndef CPP_CPU_SPEC
#define CPP_CPU_SPEC "\
-Di386 -Asystem(unix) -Acpu(i386) -Amachine(i386) \
%{mcpu=i486:-Di486} %{m486:-Di486} \
%{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
-%{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
-#endif /* __STDC__ */
-#endif /* CPP_CPU_SPEC */
+%{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686} \
+%{!mcpu:%{!m486:%{!mpentium*: %(cpp_cpu_default_spec)}}}"
+#endif
#ifndef CC1_SPEC
#define CC1_SPEC "%(cc1_spec) "
@@ -354,6 +348,7 @@
#endif
#define EXTRA_SPECS \
+ { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
{ "cpp_cpu", CPP_CPU_SPEC }, \
{ "cc1_cpu", CC1_CPU_SPEC }, \
SUBTARGET_EXTRA_SPECS
Index: config/i386/i386.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.14
diff -u -r1.14 i386.md
--- i386.md 1998/04/02 18:12:00 1.14
+++ i386.md 1998/04/03 05:32:01
@@ -6670,7 +6670,7 @@
{
char buffer[64];
- output_asm_insn (AS1 (call,%P1), operands);
+ output_asm_insn (AS1 (call,%X1), operands);
if (! TARGET_DEEP_BRANCH_PREDICTION)
{
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[1]));
@@ -6684,11 +6684,11 @@
"*
{
operands[1] = gen_label_rtx ();
- output_asm_insn (AS1 (call,%P1), operands);
+ output_asm_insn (AS1 (call,%X1), operands);
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\",
CODE_LABEL_NUMBER (operands[1]));
output_asm_insn (AS1 (pop%L0,%0), operands);
- output_asm_insn (\"addl $_GLOBAL_OFFSET_TABLE_+[.-%P1],%0\", operands);
+ output_asm_insn (\"addl $_GLOBAL_OFFSET_TABLE_+[.-%X1],%0\", operands);
RET;
}")
@@ -6963,103 +6963,63 @@
}")
-(define_expand "ffssi2"
- [(set (match_dup 2)
- (plus:SI (ffs:SI (match_operand:SI 1 "general_operand" ""))
- (const_int -1)))
- (set (match_operand:SI 0 "general_operand" "")
- (plus:SI (match_dup 2) (const_int 1)))]
- ""
- "operands[2] = gen_reg_rtx (SImode);")
-
;; Note, you cannot optimize away the branch following the bsfl by assuming
;; that the destination is not modified if the input is 0, since not all
;; x86 implementations do this.
-(define_insn ""
- [(set (match_operand:SI 0 "register_operand" "=&r")
- (plus:SI (ffs:SI (match_operand:SI 1 "nonimmediate_operand" "rm"))
- (const_int -1)))]
+(define_expand "ffssi2"
+ [(set (match_operand:SI 0 "general_operand" "")
+ (ffs:SI (match_operand:SI 1 "general_operand" "")))]
""
- "*
+ "
{
- rtx xops[3];
- static int ffssi_label_number;
- char buffer[30];
+ rtx label = gen_label_rtx (), temp = gen_reg_rtx (SImode);
- xops[0] = operands[0];
- xops[1] = operands[1];
- xops[2] = constm1_rtx;
- output_asm_insn (AS2 (bsf%L0,%1,%0), xops);
-#ifdef LOCAL_LABEL_PREFIX
- sprintf (buffer, \"jnz %sLFFSSI%d\",
- LOCAL_LABEL_PREFIX, ffssi_label_number);
-#else
- sprintf (buffer, \"jnz %sLFFSSI%d\",
- \"\", ffssi_label_number);
-#endif
- output_asm_insn (buffer, xops);
- output_asm_insn (AS2 (mov%L0,%2,%0), xops);
-#ifdef LOCAL_LABEL_PREFIX
- sprintf (buffer, \"%sLFFSSI%d:\",
- LOCAL_LABEL_PREFIX, ffssi_label_number);
-#else
- sprintf (buffer, \"%sLFFSSI%d:\",
- \"\", ffssi_label_number);
-#endif
- output_asm_insn (buffer, xops);
+ emit_insn (gen_ffssi_1 (temp, operands[1]));
+ emit_cmp_insn (operands[1], const0_rtx, NE, NULL_RTX, SImode, 0, 0);
+ emit_jump_insn (gen_bne (label));
+ emit_move_insn (temp, constm1_rtx);
+ emit_label (label);
+ temp = expand_binop (SImode, add_optab, temp, const1_rtx,
+ operands[0], 0, OPTAB_WIDEN);
- ffssi_label_number++;
- CC_STATUS_INIT;
- return \"\";
+ if (temp != operands[0])
+ emit_move_insn (operands[0], temp);
+ DONE;
}")
-(define_expand "ffshi2"
- [(set (match_dup 2)
- (plus:HI (ffs:HI (match_operand:HI 1 "general_operand" ""))
- (const_int -1)))
- (set (match_operand:HI 0 "general_operand" "")
- (plus:HI (match_dup 2) (const_int 1)))]
+(define_insn "ffssi_1"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(match_operand:SI 1 "nonimmediate_operand" "rm")] 5))]
""
- "operands[2] = gen_reg_rtx (HImode);")
+ "* return AS2 (bsf%L0,%1,%0);")
-(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=&r")
- (plus:HI (ffs:HI (match_operand:SI 1 "nonimmediate_operand" "rm"))
- (const_int -1)))]
+(define_expand "ffshi2"
+ [(set (match_operand:SI 0 "general_operand" "")
+ (ffs:HI (match_operand:HI 1 "general_operand" "")))]
""
- "*
+ "
{
- rtx xops[3];
- static int ffshi_label_number;
- char buffer[30];
+ rtx label = gen_label_rtx (), temp = gen_reg_rtx (HImode);
- xops[0] = operands[0];
- xops[1] = operands[1];
- xops[2] = constm1_rtx;
- output_asm_insn (AS2 (bsf%W0,%1,%0), xops);
-#ifdef LOCAL_LABEL_PREFIX
- sprintf (buffer, \"jnz %sLFFSHI%d\",
- LOCAL_LABEL_PREFIX, ffshi_label_number);
-#else
- sprintf (buffer, \"jnz %sLFFSHI%d\",
- \"\", ffshi_label_number);
-#endif
- output_asm_insn (buffer, xops);
- output_asm_insn (AS2 (mov%W0,%2,%0), xops);
-#ifdef LOCAL_LABEL_PREFIX
- sprintf (buffer, \"%sLFFSHI%d:\",
- LOCAL_LABEL_PREFIX, ffshi_label_number);
-#else
- sprintf (buffer, \"%sLFFSHI%d:\",
- \"\", ffshi_label_number);
-#endif
- output_asm_insn (buffer, xops);
+ emit_insn (gen_ffssi_1 (temp, operands[1]));
+ emit_cmp_insn (operands[1], const0_rtx, NE, NULL_RTX, HImode, 0, 0);
+ emit_jump_insn (gen_bne (label));
+ emit_move_insn (temp, constm1_rtx);
+ emit_label (label);
+ temp = expand_binop (HImode, add_optab, temp, const1_rtx,
+ operands[0], 0, OPTAB_WIDEN);
- ffshi_label_number++;
- CC_STATUS_INIT;
- return \"\";
+ if (temp != operands[0])
+ emit_move_insn (operands[0], temp);
+ DONE;
}")
+
+(define_insn "ffshi_1"
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (unspec:HI [(match_operand:HI 1 "nonimmediate_operand" "rm")] 5))]
+ ""
+ "* return AS2 (bsf%W0,%1,%0);")
;; These patterns match the binary 387 instructions for addM3, subM3,
;; mulM3 and divM3. There are three patterns for each of DFmode and
More information about the Gcc-bugs
mailing list