mips-sni-sysv4 failure

[John Carr]

> MIPS assemblers implement these instructions as macros.  The third
> argument is a general register which is used to implement the
> instructions when using the MIPS I ISA.  The register is ignored for
> the MIPS II and higher ISA levels which implement the instructions
> directly.
> 
> It sounds like the SINIX assembler does not follow this approach,
> mention in one of the appendices to the Kane/Heinrich book.

I investigated some more.  The assembler is part of the compiler.
With the old compiler the third operand is never permitted.  With the
new compiler the third operand is required in mips1 mode and permitted
but ignored in other modes.  Adding to the problems, gcc thinks -mips2
selects MIPS-II mode.  The assembler ignores -mips2.  "-K mips2" is
the right switch.

Probably the right solution is to use gas instead of any of the system
assemblers.  That also avoids the dwarf2 exception handling problem.