RTL SSA instructions are represented by an
These instructions are chained together in a single list that follows
a reverse postorder (RPO) traversal of the function. This means that
if any path through the function can execute an instruction I1
and then later execute an instruction I2 for the first time,
I1 appears before I2 in the list4.
Two RTL SSA instructions can be compared to find which instruction occurs earlier than the other in the RPO. One way to do this is to use the C++ comparison operators, such as:
*insn1 < *insn2
Another way is to use the
This expression is greater than zero if insn1 comes after insn2 in the RPO, less than zero if insn1 comes before insn2 in the RPO, or zero if insn1 and insn2 are the same. This order is maintained even if instructions are added to the function or moved around.
The main purpose of
rtl_ssa::insn_info is to hold
SSA information about an instruction. However, it also caches
certain properties of the instruction, such as whether it is an
inline assembly instruction, whether it has volatile accesses, and so on.
Note that this order is different from the order of the underlying RTL instructions, which follow machine code order instead.