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6.60.23.4 PowerPC AltiVec Built-in Functions Available on ISA 3.0

The following additional built-in functions are also available for the PowerPC family of processors, starting with ISA 3.0 (-mcpu=power9) or later.

Only instructions excluded from the PVIPR are listed here.

unsigned int scalar_extract_exp (double source);
unsigned long long int scalar_extract_exp (__ieee128 source);

unsigned long long int scalar_extract_sig (double source);
unsigned __int128 scalar_extract_sig (__ieee128 source);

double scalar_insert_exp (unsigned long long int significand,
                          unsigned long long int exponent);
double scalar_insert_exp (double significand, unsigned long long int exponent);

ieee_128 scalar_insert_exp (unsigned __int128 significand,
                            unsigned long long int exponent);
ieee_128 scalar_insert_exp (ieee_128 significand, unsigned long long int exponent);

int scalar_cmp_exp_gt (double arg1, double arg2);
int scalar_cmp_exp_lt (double arg1, double arg2);
int scalar_cmp_exp_eq (double arg1, double arg2);
int scalar_cmp_exp_unordered (double arg1, double arg2);

bool scalar_test_data_class (float source, const int condition);
bool scalar_test_data_class (double source, const int condition);
bool scalar_test_data_class (__ieee128 source, const int condition);

bool scalar_test_neg (float source);
bool scalar_test_neg (double source);
bool scalar_test_neg (__ieee128 source);

The scalar_extract_exp and scalar_extract_sig functions require a 64-bit environment supporting ISA 3.0 or later. The scalar_extract_exp and scalar_extract_sig built-in functions return the significand and the biased exponent value respectively of their source arguments. When supplied with a 64-bit source argument, the result returned by scalar_extract_sig has the 0x0010000000000000 bit set if the function’s source argument is in normalized form. Otherwise, this bit is set to 0. When supplied with a 128-bit source argument, the 0x00010000000000000000000000000000 bit of the result is treated similarly. Note that the sign of the significand is not represented in the result returned from the scalar_extract_sig function. Use the scalar_test_neg function to test the sign of its double argument.

The scalar_insert_exp functions require a 64-bit environment supporting ISA 3.0 or later. When supplied with a 64-bit first argument, the scalar_insert_exp built-in function returns a double-precision floating point value that is constructed by assembling the values of its significand and exponent arguments. The sign of the result is copied from the most significant bit of the significand argument. The significand and exponent components of the result are composed of the least significant 11 bits of the exponent argument and the least significant 52 bits of the significand argument respectively.

When supplied with a 128-bit first argument, the scalar_insert_exp built-in function returns a quad-precision ieee floating point value. The sign bit of the result is copied from the most significant bit of the significand argument. The significand and exponent components of the result are composed of the least significant 15 bits of the exponent argument and the least significant 112 bits of the significand argument respectively.

The scalar_cmp_exp_gt, scalar_cmp_exp_lt, scalar_cmp_exp_eq, and scalar_cmp_exp_unordered built-in functions return a non-zero value if arg1 is greater than, less than, equal to, or not comparable to arg2 respectively. The arguments are not comparable if one or the other equals NaN (not a number).

The scalar_test_data_class built-in function returns 1 if any of the condition tests enabled by the value of the condition variable are true, and 0 otherwise. The condition argument must be a compile-time constant integer with value not exceeding 127. The condition argument is encoded as a bitmask with each bit enabling the testing of a different condition, as characterized by the following:

0x40    Test for NaN
0x20    Test for +Infinity
0x10    Test for -Infinity
0x08    Test for +Zero
0x04    Test for -Zero
0x02    Test for +Denormal
0x01    Test for -Denormal

The scalar_test_neg built-in function returns 1 if its source argument holds a negative value, 0 otherwise.

The following built-in functions are also available for the PowerPC family of processors, starting with ISA 3.0 or later (-mcpu=power9). These string functions are described separately in order to group the descriptions closer to the function prototypes.

Only functions excluded from the PVIPR are listed here.

int vec_all_nez (vector signed char, vector signed char);
int vec_all_nez (vector unsigned char, vector unsigned char);
int vec_all_nez (vector signed short, vector signed short);
int vec_all_nez (vector unsigned short, vector unsigned short);
int vec_all_nez (vector signed int, vector signed int);
int vec_all_nez (vector unsigned int, vector unsigned int);

int vec_any_eqz (vector signed char, vector signed char);
int vec_any_eqz (vector unsigned char, vector unsigned char);
int vec_any_eqz (vector signed short, vector signed short);
int vec_any_eqz (vector unsigned short, vector unsigned short);
int vec_any_eqz (vector signed int, vector signed int);
int vec_any_eqz (vector unsigned int, vector unsigned int);

signed char vec_xlx (unsigned int index, vector signed char data);
unsigned char vec_xlx (unsigned int index, vector unsigned char data);
signed short vec_xlx (unsigned int index, vector signed short data);
unsigned short vec_xlx (unsigned int index, vector unsigned short data);
signed int vec_xlx (unsigned int index, vector signed int data);
unsigned int vec_xlx (unsigned int index, vector unsigned int data);
float vec_xlx (unsigned int index, vector float data);

signed char vec_xrx (unsigned int index, vector signed char data);
unsigned char vec_xrx (unsigned int index, vector unsigned char data);
signed short vec_xrx (unsigned int index, vector signed short data);
unsigned short vec_xrx (unsigned int index, vector unsigned short data);
signed int vec_xrx (unsigned int index, vector signed int data);
unsigned int vec_xrx (unsigned int index, vector unsigned int data);
float vec_xrx (unsigned int index, vector float data);

The vec_all_nez, vec_any_eqz, and vec_cmpnez perform pairwise comparisons between the elements at the same positions within their two vector arguments. The vec_all_nez function returns a non-zero value if and only if all pairwise comparisons are not equal and no element of either vector argument contains a zero. The vec_any_eqz function returns a non-zero value if and only if at least one pairwise comparison is equal or if at least one element of either vector argument contains a zero. The vec_cmpnez function returns a vector of the same type as its two arguments, within which each element consists of all ones to denote that either the corresponding elements of the incoming arguments are not equal or that at least one of the corresponding elements contains zero. Otherwise, the element of the returned vector contains all zeros.

The vec_xlx and vec_xrx functions extract the single element selected by the index argument from the vector represented by the data argument. The index argument always specifies a byte offset, regardless of the size of the vector element. With vec_xlx, index is the offset of the first byte of the element to be extracted. With vec_xrx, index represents the last byte of the element to be extracted, measured from the right end of the vector. In other words, the last byte of the element to be extracted is found at position (15 - index). There is no requirement that index be a multiple of the vector element size. However, if the size of the vector element added to index is greater than 15, the content of the returned value is undefined.

The following functions are also available if the ISA 3.0 instruction set additions (-mcpu=power9) are available.

Only functions excluded from the PVIPR are listed here.

vector long long vec_vctz (vector long long);
vector unsigned long long vec_vctz (vector unsigned long long);
vector int vec_vctz (vector int);
vector unsigned int vec_vctz (vector int);
vector short vec_vctz (vector short);
vector unsigned short vec_vctz (vector unsigned short);
vector signed char vec_vctz (vector signed char);
vector unsigned char vec_vctz (vector unsigned char);

vector signed char vec_vctzb (vector signed char);
vector unsigned char vec_vctzb (vector unsigned char);

vector long long vec_vctzd (vector long long);
vector unsigned long long vec_vctzd (vector unsigned long long);

vector short vec_vctzh (vector short);
vector unsigned short vec_vctzh (vector unsigned short);

vector int vec_vctzw (vector int);
vector unsigned int vec_vctzw (vector int);

vector int vec_vprtyb (vector int);
vector unsigned int vec_vprtyb (vector unsigned int);
vector long long vec_vprtyb (vector long long);
vector unsigned long long vec_vprtyb (vector unsigned long long);

vector int vec_vprtybw (vector int);
vector unsigned int vec_vprtybw (vector unsigned int);

vector long long vec_vprtybd (vector long long);
vector unsigned long long vec_vprtybd (vector unsigned long long);

On 64-bit targets, if the ISA 3.0 additions (-mcpu=power9) are available:

vector long vec_vprtyb (vector long);
vector unsigned long vec_vprtyb (vector unsigned long);
vector __int128 vec_vprtyb (vector __int128);
vector __uint128 vec_vprtyb (vector __uint128);

vector long vec_vprtybd (vector long);
vector unsigned long vec_vprtybd (vector unsigned long);

vector __int128 vec_vprtybq (vector __int128);
vector __uint128 vec_vprtybd (vector __uint128);

The following built-in functions are available for the PowerPC family of processors, starting with ISA 3.0 or later (-mcpu=power9).

Only functions excluded from the PVIPR are listed here.

__vector unsigned char
vec_absdb (__vector unsigned char arg1, __vector unsigned char arg2);
__vector unsigned short
vec_absdh (__vector unsigned short arg1, __vector unsigned short arg2);
__vector unsigned int
vec_absdw (__vector unsigned int arg1, __vector unsigned int arg2);

The vec_absd, vec_absdb, vec_absdh, and vec_absdw built-in functions each computes the absolute differences of the pairs of vector elements supplied in its two vector arguments, placing the absolute differences into the corresponding elements of the vector result.

The following built-in functions are available for the PowerPC family of processors, starting with ISA 3.0 or later (-mcpu=power9):

vector unsigned int vec_vrlnm (vector unsigned int, vector unsigned int);
vector unsigned long long vec_vrlnm (vector unsigned long long,
                                     vector unsigned long long);

The result of vec_vrlnm is obtained by rotating each element of the first argument vector left and ANDing it with a mask. The second argument vector contains the mask beginning in bits 11:15, the mask end in bits 19:23, and the shift count in bits 27:31, of each element.

If the cryptographic instructions are enabled (-mcrypto or -mcpu=power8), the following builtins are enabled.

Only functions excluded from the PVIPR are listed here.

vector unsigned long long __builtin_crypto_vsbox (vector unsigned long long);

vector unsigned long long __builtin_crypto_vcipher (vector unsigned long long,
                                                    vector unsigned long long);

vector unsigned long long __builtin_crypto_vcipherlast
                                     (vector unsigned long long,
                                      vector unsigned long long);

vector unsigned long long __builtin_crypto_vncipher (vector unsigned long long,
                                                     vector unsigned long long);

vector unsigned long long __builtin_crypto_vncipherlast (vector unsigned long long,
                                                         vector unsigned long long);

vector unsigned char __builtin_crypto_vpermxor (vector unsigned char,
                                                vector unsigned char,
                                                vector unsigned char);

vector unsigned short __builtin_crypto_vpermxor (vector unsigned short,
                                                 vector unsigned short,
                                                 vector unsigned short);

vector unsigned int __builtin_crypto_vpermxor (vector unsigned int,
                                               vector unsigned int,
                                               vector unsigned int);

vector unsigned long long __builtin_crypto_vpermxor (vector unsigned long long,
                                                     vector unsigned long long,
                                                     vector unsigned long long);

vector unsigned char __builtin_crypto_vpmsumb (vector unsigned char,
                                               vector unsigned char);

vector unsigned short __builtin_crypto_vpmsumh (vector unsigned short,
                                                vector unsigned short);

vector unsigned int __builtin_crypto_vpmsumw (vector unsigned int,
                                              vector unsigned int);

vector unsigned long long __builtin_crypto_vpmsumd (vector unsigned long long,
                                                    vector unsigned long long);

vector unsigned long long __builtin_crypto_vshasigmad (vector unsigned long long,
                                                       int, int);

vector unsigned int __builtin_crypto_vshasigmaw (vector unsigned int, int, int);

The second argument to __builtin_crypto_vshasigmad and __builtin_crypto_vshasigmaw must be a constant integer that is 0 or 1. The third argument to these built-in functions must be a constant integer in the range of 0 to 15.

The following sign extension builtins are provided:

vector signed int vec_signexti (vector signed char a)
vector signed long long vec_signextll (vector signed char a)
vector signed int vec_signexti (vector signed short a)
vector signed long long vec_signextll (vector signed short a)
vector signed long long vec_signextll (vector signed int a)
vector signed long long vec_signextq (vector signed long long a)

Each element of the result is produced by sign-extending the element of the input vector that would fall in the least significant portion of the result element. For example, a sign-extension of a vector signed char to a vector signed long long will sign extend the rightmost byte of each doubleword.


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