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[patch] PR30513
- From: Andreas Tobler <toa at pop dot agri dot ch>
- To: Java Patches <java-patches at gcc dot gnu dot org>
- Date: Wed, 24 Jan 2007 13:33:06 +0100
- Subject: [patch] PR30513
Hello all,
for details have a look at the PR.
Here comes my proposal for a patch. It is the easiest one in terms of
testing and modifying files.
Thanks goes to Tom and PinskiA.
Ok for trunk?
I'd like a sparc expert to look at the read/write barriers. Are they
correct ? Who is one ??
Andreas
2007-01-24 Andreas Tobler <a.tobler@schweiz.org>
PR libgcj/30513
* configure.host: Add forgottten sysdep_dir to sparc. Add a flag to
libgcj_flags to undefine 'sun' at compile time.
* sysdep/sparc/locks.h (read_barrier): New functions for 32 and 64 bit
Sparc.
(write_barrier): Likewise.
Index: configure.host
===================================================================
--- configure.host (revision 121008)
+++ configure.host (working copy)
@@ -159,6 +159,10 @@
enable_hash_synchronization_default=yes
;;
sparc*-*)
+ sysdeps_dir=sparc
+ # On Solaris we have defined 'sun' which later conflicts with
+ # namespace usage. So to work this away we use the below undefine.
+ libgcj_flags="${libgcj_flags} -Usun"
libgcj_interpreter=yes
;;
ia64-*)
Index: sysdep/sparc/locks.h
===================================================================
--- sysdep/sparc/locks.h (revision 121008)
+++ sysdep/sparc/locks.h (working copy)
@@ -1,6 +1,6 @@
// locks.h - Thread synchronization primitives. Sparc implementation.
-/* Copyright (C) 2002 Free Software Foundation
+/* Copyright (C) 2002, 2007 Free Software Foundation
This file is part of libgcj.
@@ -38,12 +38,23 @@
}
inline static bool
-compare_and_swap_release(volatile obj_addr_t *addr,
- obj_addr_t old,
- obj_addr_t new_val)
+compare_and_swap_release(volatile obj_addr_t *addr, obj_addr_t old,
+ obj_addr_t new_val)
{
return compare_and_swap(addr, old, new_val);
}
+
+inline static void
+read_barrier()
+{
+ __asm__ __volatile__("membar #LoadLoad | #LoadStore" : : : "memory");
+}
+
+inline static void
+write_barrier()
+{
+ __asm__ __volatile__("membar #StoreLoad | #StoreStore" : : : "memory");
+}
#else
/* Sparc32 implementation, use a spinlock. */
static unsigned char __cas_lock = 0;
@@ -109,12 +120,23 @@
}
inline static bool
-compare_and_swap_release(volatile obj_addr_t *addr,
- obj_addr_t old,
- obj_addr_t new_val)
+compare_and_swap_release(volatile obj_addr_t *addr, obj_addr_t old,
+ obj_addr_t new_val)
{
return compare_and_swap(addr, old, new_val);
}
+
+inline static void
+read_barrier()
+{
+ __asm__ __volatile__ ("" : : : "memory");
+}
+
+inline static void
+write_barrier()
+{
+ __asm__ __volatile__ ("" : : : "memory");
+}
#endif /* __arch64__ */
#endif /* ! __SYSDEP_LOCKS_H__ */