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Re: Special Memory Constraint [was Re: Indirect memory addresses vs. lra]


On Mon, Aug 19, 2019 at 09:14:22AM -0400, Vladimir Makarov wrote:
> On 2019-08-19 3:35 a.m., John Darrington wrote:
> >On Fri, Aug 16, 2019 at 10:50:13AM -0400, Vladimir Makarov wrote:
> >      No I meant something like that
> >      
> >      (define_special_memory_constraint "a" ...)
> >      (define_predicate "my_special_predicate" ...
> >      		
> >       {
> >         if (lra_in_progress_p)
> >           return REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER && 
> >           reg_renumber[REGNO(op)] < 0;
> >         return true if memory with sp addressing;
> >      })
> >      
> >      I think LRA spills pseudo-register and it will be memory addressed 
> >      by sp
> >      at the end of LRA.
> >
> >What I've done is this:
> >
> >(define_predicate "my_special_predicate"
> >		    (match_operand 0 "memory_operand")
> >  {
> >    debug_rtx (op);
> >    gcc_assert (MEM_P (op));
> >    op = XEXP (op, 0);
> >    if (GET_CODE (op) == PLUS)
> >      op = XEXP (op, 0);
> >
> >    if (lra_in_progress)
> >      {
> >        fprintf (stderr, "%s:%d\n", __FILE__, __LINE__);
> >        return REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER && 
> >        reg_renumber[REGNO(op)] < 0;
> >      }
> >
> >
> >    if (REG_P (op))
> >      {
> >        int regno = REGNO (op);
> >        return (regno == 10); // register is the stack pointer
> >      }
> >
> >    return true;
> >  })
> >
> >  (and many variations)  Unfortunately, any moderately complicated input
> >  still results in a (mem (reg) ) insn repeatedly entering the
> >  lra_in_progress case and returning false, and eventually terminating with
> >      
> >  "internal compiler error: maximum number of generated reload insns per 
> >  insn achieved (90)"
> >
> >
> >Any other ideas?
>   As I remember there were a few other ideas from Richard Biener and 
> Segher Boessenkool.  I also proposed to add a new address register which 
> will be always a fixed stack memory slot at the end. Unfortunately I am 
> not familiar with the target and the port to say in details how to do 
> it.  But I think it is worth to try.

The m68hc11 port used the fake Z register approach, and I believe it had
some special machine pass to get rid of it right before assembler output.

(r171302 is when it was removed -- last version was
https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/m68hc11/m68hc11.c;h=1e414102c3f1fed985e4fb8db7954342e965190b;hb=bae8bb65d842d7ffefe990c1f0ac004491f3c105#l4061
for the machine reorg stuff).

No idea how well it works...  But it's only needed if you are forced to
have a frame pointer IIUC?


Segher


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