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Re: Expansion of narrowing math built-ins into power instructions

On Wed, Aug 14, 2019 at 11:51:28AM +0530, Tejas Joshi wrote:
> > The RTL needs to be something that
> > does *not* match the combination of separate operations (just as fma has
> > its own RTL, and a separate pass is responsible for converting separate
> So do I need to introduce fadd's own RTL just as fma which would emit
> a fused instruction while -ffp-contract is default (fast) and would
> emit separate instructions like add in DFmode and then truncate to SF?
> while -ffp-contract=off ? (just as fma)

I think you can do one RTL code that replaces float_truncate in

> > > > (define_insn "add_truncdfsf3"
> > > >   [(set (match_operand:SF 0 "gpc_reg_operand" "=f,wa")
> > > >     (float_truncate:SF
> > > >       (plus:DF (match_operand:DF 1 "gpc_reg_operand" "%d,wa")
> > > >                (match_operand:DF 2 "gpc_reg_operand" "d,wa"))))]

but that is only meant for such explicit contraction.  This can then
happily be used to implement all such patterns.  Is there some issue
with that I overlook?

A good name for this...  I would say "float_contract", because I like
horrible names.  It shouldn't be hard to think of something better :-)


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