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Re: Expansion of narrowing math built-ins into power instructions


Hi!

On Sat, Aug 10, 2019 at 04:00:53PM +0530, Tejas Joshi wrote:
> I have been trying to write a basic pattern taking all the suggestions
> you both have mentioned. The same patch is attached here, but I cannot
> see call to :
> 
> float
> foo (double x, double y)
> {
>     return __builtin_fadd (x, y);
> }
> being expanded to any instruction, at least a simple one, using
> -fno-builtin-fadd (and also -mhard-float?). It always stays "bl fadd".
> What am I missing here?

As far as I understand that flag should set the behaviour of the fadd
function, not the __builtin_fadd one.  So I don't know.

> > (POWER8 and later) on.  (The result if OE=1 or UE=1 is undefined).  (See
> > 4.3.5.1 in the ISA).
> 
> 4.3.5.1 in the ISA says that single precision arithmetic instructions
> perform operation in double format and coerces the result in single
> format. Can fadd be considered as this type of instruction or do I
> need to perform add in DFmode and then use "instruction provided to
> explicitly convert double format operand in FPR to single format."?

A single precision add is "fadds".  It rounds its result to single
precision.

I'm lost what the exact semantic of the wanted fadd() function are.
I thought you wanted to add two single precision numbers, producing a
double precision one.  But instead you want to add two double precision
numbers, producing a single precision one?  The fadds instruction fits
well to that, but you'll have to check exactly how the fadd() function
should behave with respect to rounding and exceptions and the like.


Segher


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