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Re: Expansion of narrowing math built-ins into power instructions
- From: Joseph Myers <joseph at codesourcery dot com>
- To: Segher Boessenkool <segher at kernel dot crashing dot org>
- Cc: Tejas Joshi <tejasjoshi9673 at gmail dot com>, <gcc at gcc dot gnu dot org>, Martin Jambor <mjambor at suse dot cz>, <hubicka at ucw dot cz>
- Date: Thu, 8 Aug 2019 23:09:02 +0000
- Subject: Re: Expansion of narrowing math built-ins into power instructions
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- References: <ri6imrkzqq6.fsf@suse.cz> <87sgqnx4i6.fsf@oldenburg2.str.redhat.com> <alpine.DEB.2.21.1907301947090.10734@digraph.polyomino.org.uk> <CACMrGjBiEMp7jj=b30MQ-8SMYoPA_4BFTdQRQSbV7WkYmv+Opg@mail.gmail.com> <20190731144722.GS31406@gate.crashing.org> <CACMrGjC5T-BNowawG9WiKi-C6FRMrtNKnkUSsn1TVT3iFN-Zdg@mail.gmail.com> <20190808200514.GL31406@gate.crashing.org>
On Thu, 8 Aug 2019, Segher Boessenkool wrote:
> These current patterns all take the same mode for all inputs and outputs
> (that's what <mode>3 indicates, say, fadddf3). You will need to define
> something that takes two SFs in and produces a DF. That cannot really
For example, md.texi describes standard patterns such as mulhisi3 that
multiply two HImode values and produce an SImode result (widening integer
multiply).
Using a similar naming pattern, you might have a pattern adddfsf3 that
multiplies two DFmode values and produces an SFmode result (or you could
call it something like add_truncdfsf3 if you wish to emphasise the
truncation involved, for example). Similarly addtfsf3 that multiplies
TFmode and produces an SFmode result, and so on. Of course these names
need documenting (and you need corresponding RTL for them to generate that
distinguishes the fused add+truncate from the different RTL for separate
addition and truncation with double rounding). In cases where long double
and double have the same mode, the daddl function should use the existing
adddf3 pattern.
--
Joseph S. Myers
joseph@codesourcery.com