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Re: Subnormal float support in armv7(with -msoft-float) for intrinsics
On Tue, Jul 17, 2018 at 10:41 AM, Umesh Kalappa
<umesh.kalappa0@gmail.com> wrote:
> Hi Nagy,
>
> Please help us with your comments on the attached patch for the issue
> (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86512)
>
> Thank you and waiting for your inputs on the same.
Patches should be sent to gcc-patches@gcc.gnu.org with a clear
description of what the patch hopes to
achieve and why this is correct, how was it tested and if a regression
test needs to be added - add one please.
Please read https://gcc.gnu.org/contribute.html before sending a patch.
This is the wrong list to send patches to.
regards
Ramana
> ~Umesh
>
> On Fri, Jul 13, 2018 at 1:22 PM, Umesh Kalappa <umesh.kalappa0@gmail.com> wrote:
>> Thank you and issue raised at
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86512
>>
>> ~Umesh
>>
>> On Thu, Jul 12, 2018 at 9:33 PM, Szabolcs Nagy <szabolcs.nagy@arm.com> wrote:
>>> On 12/07/18 16:20, Umesh Kalappa wrote:
>>>>
>>>> Hi everyone,
>>>>
>>>> we have our source base ,that was compiled for armv7 on gcc8.1 with
>>>> soft-float and for following input
>>>>
>>>> a=0x0010000000000000
>>>> b=0x0000000000000001
>>>>
>>>> result = a - b ;
>>>>
>>>> we are getting the result as "0x000ffffffffffffe" and with
>>>> -mhard-float (disabled the flush to zero mode ) we are getting the
>>>> result as ""0x000fffffffffffff" as expected.
>>>>
>>>
>>> please submit it as a bug report to bugzilla
>>>
>>>
>>>> while debugging the soft-float code,we see that ,the compiler calls
>>>> the intrinsic "__aeabi_dsub" with arm calling conventions i.e passing
>>>> "a" in r0 and r1 registers and respectively for "b".
>>>>
>>>> we are investigating the routine "__aeabi_dsub" that comes from libgcc
>>>> for incorrect result and meanwhile we would like to know that
>>>>
>>>> a)do libgcc routines/intrinsic for float operations support or
>>>> consider the subnormal values ? ,if so how we can enable the same.
>>>>
>>>> Thank you
>>>> ~Umesh
>>>>
>>>