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code-gen options for disabling multi-operand AArch64 and ARM instructions
- From: Laszlo Ersek <lersek at redhat dot com>
- To: gcc at gcc dot gnu dot org
- Cc: Ard Biesheuvel <ard dot biesheuvel at linaro dot org>, Kevin Fenzi <kevin at scrye dot com>, Peter Robinson <perobins at redhat dot com>, Florian Weimer <fweimer at redhat dot com>, Fabiano Fidencio <ffidenci at redhat dot com>, "Daniel P. Berrange" <berrange at redhat dot com>, Drew Jones <drjones at redhat dot com>, Jeremy Linton <jeremy dot linton at arm dot com>, Paul Whalen <pwhalen at redhat dot com>, Jared Smith <jsmith dot fedora at gmail dot com>, Samuel Sieb <samuel-rhbugs at sieb dot net>, Dominik 'Rathann' Mierzejewski <dominik at greysector dot net>, Peter Robinson <pbrobinson at gmail dot com>, Jonathan Masters <jcm at redhat dot com>, Marc Zyngier <marc dot zyngier at arm dot com>, Christoffer Dall <christoffer dot dall at arm dot com>
- Date: Mon, 4 Jun 2018 20:10:48 +0200
- Subject: code-gen options for disabling multi-operand AArch64 and ARM instructions
Hi!
Apologies if this isn't the right place for asking. For the problem
statement, I'll simply steal Ard's writeup [1]:
> KVM on ARM refuses to decode load/store instructions used to perform
> I/O to emulated devices, and instead relies on the exception syndrome
> information to describe the operand register, access size, etc. This
> is only possible for instructions that have a single input/output
> register (as opposed to ones that increment the offset register, or
> load/store pair instructions, etc). Otherwise, QEMU crashes with the
> following error
>
> error: kvm run failed Function not implemented
> [...]
> QEMU: Terminated
>
> and KVM produces a warning such as the following in the kernel log
>
> kvm [17646]: load/store instruction decoding not implemented
>
> GCC with LTO enabled will emit such instructions for Mmio[Read|Write]
> invocations performed in a loop, so we need to disable LTO [...]
We have a Red Hat Bugzilla about the (very likely) same issue [2].
Earlier, we had to work around the same on AArch64 too [3].
Would it be possible to introduce a dedicated -mXXX option, for ARM and
AArch64, that disabled the generation of such multi-operand
instructions?
I note there are several similar instructions (for other architectures):
* -mno-multiple (ppc)
* -mno-fused-madd (ia64)
* -mno-mmx and a lot of friends (x86)
Obviously, if the feature request is deemed justified, we should provide
the exact family of instructions to disable. I'll leave that to others
on the CC list with more ARM/AArch64 expertise; I just wanted to get
this thread started. (Sorry if the option is already being requested
elsewhere; I admit I didn't search the GCC bugzilla.)
Thanks!
Laszlo
[1] https://lists.01.org/pipermail/edk2-devel/2018-June/025476.html
[2] https://bugzilla.redhat.com/show_bug.cgi?id=1576593
[3] https://github.com/tianocore/edk2/commit/2efbf710e27a