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Re: atomic_thread_fence() semantics


On 19/10/17 12:58, Mattias Rönnblom wrote:
> I have this code:
> 
> #include <stdatomic.h>
> 
> int ready;
> int message;
> 
> void send_x4711(int m) {
>      message = m*4711;
>      atomic_thread_fence(memory_order_release);
>      ready = 1;
> }
> 
> When I compile it with GCC 7.2 -O3 -std=c11 on x86_64 it produces the 
> following code:
> 
> send_x4711:
> .LFB0:
> .LVL0:
>          imul    edi, edi, 4711
> .LVL1:
>          mov     DWORD PTR ready[rip], 1
>          mov     DWORD PTR message[rip], edi
>          ret
> 
> I expected the store to 'message' and 'ready' to be in program order.
> 
> Did I misunderstand the semantics of 
> atomic_thread_fence+memory_order_release?

No, you did not.  This looks like a bug.  Please report it.

The tree dump looks OK:

send_x4711 (int m)
{
  int _1;

  <bb 2> [100.00%]:
  _1 = m_2(D) * 4711;
  message = _1;
  __atomic_thread_fence (3);
  ready = 1;
  return;

}

It looks like a bug in the lowering pass.

;; __atomic_thread_fence (3);

is lowered to

(nil)

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671


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