This is the mail archive of the mailing list for the GCC project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Re: (R5900) Implementing Vector Support

Hi Richard,

Thank you for your input so far. I think that I am starting to have a clearer picture of things.

Unfortunately, I haven't been able to put together a working system for the vector comparison stuff.

The second operand is the comparison operator.  So given

  (set (reg:V4SI x) (eq:V4SI (reg:V4SI y) (reg:V4SI z))

operand 0 is x,
operand 1 is the entire (eq ...) expression,
operand 2 is y,
operand 3 is z.

This is exactly the same as the normal integer cbranch<mode> patterns.

I've done something like that, but GCC still doesn't select the pattern to use:
    (define_insn "vec_cmp<MMI_VCMP_OP:code><MMI_VWHB:mode>"
      [(set (match_operand:MMI_VWHB 0 "register_operand" "=d")
(MMI_VCMP_OP:MMI_VWHB (match_operand:MMI_VWHB 1 "register_operand" "d")
(match_operand:MMI_VWHB 2 "register_operand" "d")))]

This was based on the one from the s390 port.

If it is worth implementing the vec_cmp patterns, is there an example for me to refer to?

rs6000 doesn't implement bare comparisons, but only implements the "vcond" conditional move upon which uses the comparison. Many of the other targets do the same thing.

Is there a reason why implementing only vcond is preferred?

Thanks and Regards,
-W Y

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]