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Re: Question about "instruction merge" pass when optimizing for size
- From: "sarah at hederstierna dot com" <fredrik at hederstierna dot com>
- To: Jeff Law <law at redhat dot com>, DJ Delorie <dj at redhat dot com>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Thu, 20 Aug 2015 07:07:53 +0000
- Subject: Re: Question about "instruction merge" pass when optimizing for size
- Authentication-results: sourceware.org; auth=none
- References: <CE36BD26828FA5408B9F87E4DD2ACB0B0135774D9F16 at MBXVS01 dot HMC dot local> <4ad27b0cf3dd4b12a4a2a4530ce2f15a at DAG03 dot HMC dot local> <201508192038 dot t7JKcVV7000807 at greed dot delorie dot com>,<55D4F00A dot 2 at redhat dot com>
> From: Jeff Law <email@example.com>
> More important is to determine *why* we're getting these patterns. In
> the IRA/LRA world, they should be a lot less common.
Yes I agree this phenomena seems more common after introducing LRA.
Though I was thinking that such a pass still maybe can be relevant.
Thinking hypothetically of an architecture, lets call it cortex-X,
assume this specific target type have an op-code for ADD with 5-operands.
Optimal code for
a = a + b + c + d
where in the optimization process do we introduce the merging into this target type specific instruction.
Can the more generic IRA/LRA handle this?
And maybe patterns can appear across different BB, or somewhere that the normal optimizers have hard to find, or figure out?
Sorry if I'm ignorant, I don't know the internals of the different optimizers, but I'm trying to learn and understand how to come forward on this issue we have with code size currently.
(I tried to but some bugs on it also Bug 61578 and Bug 67213.)
Thanks and Kind Regards, Fredrik