Re: Invalid code emitted

[Ian Lance Taylor <iant at google dot com>]

On Tue, Jan 21, 2014 at 12:52 AM, Umesh Kalappa
<umesh.kalappa0@gmail.com> wrote:
>
> The following C  code snippet
>
> unsigned char c ;
> int d ;
>
> int test ()
> {
>  d = c;
> return d;
> }
>
> below is the RTL without optimisation enabled
>
> (insn 6 5 0 (set (reg:QI 18 [ c.0 ])
>
>         (mem/c:QI (symbol_ref:HI ("c")  <var_decl 0xb73a50b8 c>) [0
> c+0 S1 A8])) cnv.c:5 -1
>
>      (nil))
>
>
> (insn 7 6 8 (set (reg:QI 19)
>
>         (const_int 0 [0])) cnv.c:5 -1
>
>      (nil))
>
>
>
> (insn 8 7 0 (set (reg:HI 19 [ d.1 ])
>
>         (subreg:HI (reg:QI 18 [ c.0 ]) 0)) cnv.c:5 -1
>
>      (expr_list:REG_EQUAL (zero_extend:HI (reg:QI 18 [ c.0 ]))
>
>         (nil)))
>
>
>
> (insn 9 8 0 (set (mem/c:HI (symbol_ref:HI ("d")  <var_decl 0xb73a5114
> d>) [0 d+0 S2 A16])
>
>         (reg:HI 19 [ d.1 ])) cnv.c:5 -1
>
>      (nil))
>
>
>
> (insn 10 9 0 (set (reg:HI 20 [ D.1323 ])
>
>         (mem/c:HI (symbol_ref:HI ("d")  <var_decl 0xb73a5114 d>) [0
> d+0 S2 A16])) cnv.c:6 -1
>
>      (nil))
>
> and  respective ASM
>
> ld      C, (c)
> ld      B, 0
> ld      (d), BC
> ld      WA, (d)
> ret
>
>
> But problem arises when i enabled the optimisation -O3 ( with -da)  .
>
> RTL is expanded  as show above, but after subreg pass(*.subreg)   we
> see the below RTL
>
>
> (note 4 0 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
>
> (note 3 4 8 2 NOTE_INSN_FUNCTION_BEG)
>
> (insn 8 3 9 2 (set (mem/c:HI (symbol_ref:HI ("d")  <var_decl
> 0xb7356114 d>) [2 d+0 S2 A16])
>
>         (reg:HI 19 [ d.1 ])) cnv.c:5 9 {*movhi}
>
>      (nil))
>
> (insn 9 8 13 2 (set (reg:HI 20 [ <retval> ])
>
>         (reg:HI 19 [ d.1 ])) cnv.c:6 9 {*movhi}
>
>      (nil))
>
> (insn 13 9 16 2 (set (reg/i:HI 0 W)
>
>         (reg:HI 20 [ <retval> ])) cnv.c:7 9 {*movhi}
>
>      (nil))
>
> (insn 16 13 0 2 (use (reg/i:HI 0 W)) cnv.c:7 -1
>
>      (nil))
>
> ;;  su
>
> and respective asm emited as
>
>
> ld      C, (c)
> ld      (d), BC ;This is invalid  since B can have a clobbered value
> ld      WA, (d)
> ret
>
> Would like know there exist any target hook to surpass the above
> optimization so that i ended up emitting valid instructions.
>
> Any lights on the above problem is appreciated .


You didn't say what target you are using, you didn't say what version
of GCC you are using, and you didn't give enough information to
understand what is happening.  I don't know what the "ld (d),BC"
syntax means, but perhaps it means that two different registers, B and
C, are combined to form a single value.  If that is true, then it
appears that the subreg pass has dropped the insn setting
pseudo-register 19.  I have no idea how that could happen; it suggests
a bug in your backend port when handling a movqi of a subreg.

Ian