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Re: cortex-m3(gcc.4.6.3)



> On Oct 9, 2013, at 2:14 AM, Umesh Kalappa <umesh.kalappa0@gmail.com> wrote:
> 
> Dear Group,
> 
> The below asm is generated for target  cortex-m3 (gcc-4.6.3)
> 
> main:
>    @ args = 0, pretend = 0, frame = 0
>    @ frame_needed = 0, uses_anonymous_args = 0
>    push {r3, r4, r5, lr}
>    bl  vAlgTNoOptimize
>    movs r0, #170
>    bl  vFnCall
>    bl  vAlgTOptimize
>    ldr r4, .L22
>    add r5, r4, #88
> .L20:
>    ldr r1, [r4, #4]!
>    movs r0, #2
>    ldr r2, [r4, #88]
>    bl  ucCheckResult
>    cbnz r0, .L19
>    cmp r4, r5
>    bne .L20
>    ldr r0, .L22+4
>    ldr r1, .L22+8
>    pop {r3, r4, r5, lr}
>    b   printf
> .L19:
>    ldr r0, .L22+12
>    ldr r1, .L22+8
>    pop {r3, r4, r5, lr}
>    b   printf
> 
> From the   main  prologue ,we can see that the instruction  " push
> {r3, r4, r5, lr} " ,where we are saving r3-r5 and lr and restoring the
> same in the epilogue,saving r4,r5 (callee save ) and
> lr(call_used_register) make sense here w.r.t ARM EABI,But i didn't get
> why we save r3 here and where we don't use r3 in the function ???.
> 
> Or i'm missing something here  ???

Yes stack alignment. 


> 
> Thanks
> ~Umesh


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