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Re: Instruction scheduling question
- From: Steve Ellcey <sellcey at mips dot com>
- To: Eric Botcazou <ebotcazou at adacore dot com>
- Cc: <gcc at gcc dot gnu dot org>
- Date: Fri, 14 Jun 2013 15:49:25 -0700
- Subject: Re: Instruction scheduling question
- References: <7edfa0c9-925f-429e-bacf-1c707b426bba at BAMAIL02 dot ba dot imgtec dot org> <1763626 dot AdVmygOTST at polaris>
On Sat, 2013-06-15 at 00:06 +0200, Eric Botcazou wrote:
> > The part of the scheduling change that I am interested in is the change in
> > where the addiu instruction occurs and the related changes from the positive
> > offsets to the negative offsets. Can anyone tell me where the code that
> > decides to do that is? Extra bonus points for any answer not including the
> > word 'reload'.
>
> Very likely in sched-deps.c:find_modifiable_mems and related functions.
That looks like the right place. It seems to be triggered by the
DONT_BREAK_DEPENDENCIES flag in the haifa scheduler. As an experiment,
I added DONT_BREAK_DEPENDENCIES to the scheduling flags and it no longer
did that transformation.
Thanks.
Steve Ellcey
sellcey@mips.com