Re: Why doesn't vetorizer skips loop peeling/versioning for target supports hardware misaligned access?

[Tim Prince <n8tm at aol dot com>]

On 1/24/2011 5:21 AM, Bingfeng Mei wrote:
> Hello,
> Some of our target processors support complete hardware misaligned
> memory access. I implemented movmisalignm patterns, and found
> TARGET_SUPPORT_VECTOR_MISALIGNMENT (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
> On 4.6) hook is based on checking these patterns. Somehow this
> hook doesn't seem to be used. vect_enhance_data_refs_alignment
> is called regardless whether the target has HW misaligned support
> or not.
>
> Shouldn't using HW misaligned memory access be better than
> generating extra code for loop peeling/versioning? Or at least
> if for some architectures it is not the case, we should have
> a compiler hook to choose between them. BTW, I mainly work
> on 4.5, maybe 4.6 has changed.
>
> Thanks,
> Bingfeng Mei
Peeling for alignment still presents a performance advantage on longer 
loops for the most common current CPUs.  Skipping the peeling is likely 
to be advantageous for short loops.
I've noticed that 4.6 can vectorize loops with multiple assignments, 
presumably taking advantage of misalignment support.  There's even a 
better performing choice of instructions for -march=corei7 misaligned 
access than is taken by other compilers, but that could be an accident.
At this point, I'd like to congratulate the developers for the progress 
already evident in 4.6.

--
Tim Prince