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Re: A question about combining constraints
- From: Gerald Pfeifer <gerald at pfeifer dot com>
- To: Joern Rennecke <amylaar at spamcop dot net>
- Cc: Mohamed Shafi <shafitvm at gmail dot com>, GCC <gcc at gcc dot gnu dot org>, Joseph Myers <joseph at codesourcery dot com>, Ulrich Weigand <uweigand at de dot ibm dot com>, Bernd Schmidt <bernds at codesourcery dot com>
- Date: Mon, 17 Jan 2011 02:10:00 +0100 (CET)
- Subject: Re: A question about combining constraints
- References: <AANLkTikv9vPDk5fqOLSkbyQE_EQ7DcpkyjdaYaqqi73h@mail.gmail.com> <20101112080927.3ueh21cyok8k404c-nzlynne@webmail.spamcop.net> <AANLkTi=t7Bbr17shTEg7My-RChYa-FF7Gf6afu1a2h-p@mail.gmail.com> <20101112085440.9rf1bea7cow4co44-nzlynne@webmail.spamcop.net>
On Fri, 12 Nov 2010, Joern Rennecke wrote:
Please read the node "Register Classes" in doc/tm.texi .
I am sorry , could you please highlight the relevant portion for me?
In the pattern that i have given the combination (a,W) satisfies the
pattern. But its not matched because i have given then like (da,Wd). I
know that we can combine the constraints together.
Do you think that the attached patch improves the documentation?
Yes, I think so. Unless someone else disagrees, mind going ahead
and committing your patch (attached again in case you don't have
it handy anymore).
Thanks,
Gerald
2010-11-12 Joern Rennecke <amylaar@spamcop.net>
* doc/tm.texi.in: Spell out that a lack of register class unions
can lead to ICEs.
* doc/tm.texi: Regenerate.
Index: doc/tm.texi
===================================================================
--- doc/tm.texi (revision 166609)
+++ doc/tm.texi (working copy)
@@ -2337,7 +2343,9 @@ union of two classes will be another cla
instruction allows both classes. For example, if an instruction allows
either a floating point (coprocessor) register or a general register for a
certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
-which includes both of them. Otherwise you will get suboptimal code.
+which includes both of them. Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in the
+the class computed via @code{reg_class_subunion}.
You must also specify certain redundant information about the register
classes: for each class, which classes contain it and which ones are
Index: doc/tm.texi.in
===================================================================
--- doc/tm.texi.in (revision 166609)
+++ doc/tm.texi.in (working copy)
@@ -2327,7 +2333,9 @@ union of two classes will be another cla
instruction allows both classes. For example, if an instruction allows
either a floating point (coprocessor) register or a general register for a
certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
-which includes both of them. Otherwise you will get suboptimal code.
+which includes both of them. Otherwise you will get suboptimal code,
+or even internal compiler errors when reload cannot find a register in the
+the class computed via @code{reg_class_subunion}.
You must also specify certain redundant information about the register
classes: for each class, which classes contain it and which ones are