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atomicity of x86 bt/bts/btr/btc?
- From: Jay K <jay dot krell at cornell dot edu>
- To: gcc <gcc at gcc dot gnu dot org>
- Date: Tue, 19 Oct 2010 07:41:57 +0000
- Subject: atomicity of x86 bt/bts/btr/btc?
gcc-4.5/gcc/config/i386/i386.md:
;; %%% bts, btr, btc, bt.
;; In general these instructions are *slow* when applied to memory,
;; since they enforce atomic operation. When applied to registers,
I haven't found documented confirmation that these instructions are atomic without a lock prefix,
having checked Intel and AMD documentation and random web searching.
They are mentioned as instructions that can be used with lock prefix.
- Jay