Adding memory write to a sparc fsqrts insn

[k e <eiselekd at gmail dot com>]

Hello everybody,
I'd like to patch gcc's sparc machine descritpion so
that the destination register of a fpu sqareroot operation fsqrts
is stored into memory after each fsqrts.

like this:

fsqrts %f2,%f4
st %f4, -4[%fp]  <= add this after every fsqrts where -4[%fp] is
                             a slot allocated on the stack for each fsqrts insn

The sparc.md portion that defines the fsqrts pattern is:

(define_insn "sqrtsf2"
  [(set (match_operand:SF 0 "register_operand" "=f")
	(sqrt:SF (match_operand:SF 1 "register_operand" "f")))]
  "TARGET_FPU"
  "fsqrts\t%1, %0"
  [(set_attr "type" "fpsqrts")])

i thought I could add  the "st %f4, -4[%fp]" there. But now
my question:

- Where/when/how can I allocate the stackframe slot to save the
  destination fp reg in (the offset to %fp).

I'm not that familiar with rtl representation and the stages
of compilation. So any help would be apreciated.

Maybe another architecture has a similar construct already
that I could study and use for my purpose. If somebody
can point me to such machine description part ...

-- Greetings Konrad