Re: How to write shift and add pattern?

[Mohamed Shafi <shafitvm at gmail dot com>]

2009/11/6 Ian Lance Taylor <iant@google.com>:
> Mohamed Shafi <shafitvm@gmail.com> writes:
>
>> It is generating with data registers. Here is the pattern that i have
>> written:
>>
>>
>> (define_insn "*saddl"
>> ? [(set (match_operand:SI 0 "register_operand" "=r,d")
>> ? ? ? (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "r,d")
>> ? ? ? ? ? ? ? ? ? ? ? ? (match_operand:SI 2 "const24_operand" "J,J"))
>> ? ? ? ? ? ? ? ?(match_operand:SI 3 "register_operand" "0,0")))]
>>
>> How can i do this. Will the constraint modifiers '?' or '!' help?
>> How can make GCC generate shift and add sequence when the shift count is 1?
>
> Does 'd' represent a data register? ?I assume that 'r' is a general
> register, as it always is. ?What is the constraint character for an
> address register? ?You don't seem to have an alternative here for
> address registers, so I'm not surprised that the compiler isn't
> picking it. ?No doubt I misunderstand something.
>
   Ok the constrain for address register is 'a'. Thats typo in the
pattern that i given here. The proper pattern is

 (define_insn "*saddl"
   [(set (match_operand:SI 0 "register_operand" "=a,d")
       (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "a,d")
                         (match_operand:SI 2 "const24_operand" "J,J"))
                (match_operand:SI 3 "register_operand" "0,0")))]

So how can i choose the address registers over data registers if that
is more profitable?

Regards,
Shafi