Re: Register Pressure in Instruction Level Parallelism

[Albert Cohen <Albert dot Cohen at inria dot fr>]

Vladimir Makarov wrote:
> I've just checked the thesis again.  I don't think decreasing register 
> pressure through spilling will work well.  First of all Polleto linear 
> scan RA is worse than Chaitin-Briggs approach.  Even its major 
> improvement extending linear scan is worse than Chaitin-Briggs 
> approach.  My experience with an ELS implementation in GCC has shown me 
> this although in original article about ELS the opposite is stated (the 
> comparison in the article was done in GCC but with the new ra project 
> which was unsuccessful implementation of Chaitin-Briggs RA and it was 
> done only on ppc64.  I am sure that on x86/x86_64 ELS would behave even 
> worse).  That is about basic RA spill in Touti's thesis.

Touati's thesis has a section on spill insertion in the DDG to deal with 
excessive register sufficienty, but he did not have time to implement it.

However, there is a new implementation, in C, to compute saturation, 
sufficiency, insert the extra dependences and spills. This is not yet as 
complete as the previous version (used to be in C++ and based on the 
proprietary LEDA graph algorithm toolkit), but is available to those of 
you interested. The license will a priori become LGPL for the time 
being, but I guess Sid Touati is willing to assign his copyright for 
specific versions and transfer the code directly to GCC if needed. In 
any case, please talk to Sid directly (in CC).

Albert