Re: Register Pressure in Instruction Level Parallelism

[Michael Kruse <meinert at uni-paderborn dot de>]

[Posting this again because I noticed that I sent this to Dave Korn only]

Hi Dave,

Dave Korn wrote:
>   One of the major problems in gcc is the intertangling of instruction
> selection with register allocation and spill generation.  If these 
could be
> separated it would almost certainly generate better code and be 
welcomed with
> open arms!
>  
The separation of these is one concern of the thesis. Although, it does
not separate them completely.

>> I'd prefer to implement this for the gcc, but my advisor wants me to do
>> it for the university's own compiler. Therefore I could also need
>> arguments why to do it for the GCC.
>>    
>
>   Because destroying reload(*) would be an incalculable public 
service and
> your name will be remembered in history as the one who slew the 
dragon? ;-)
>  
Yeah, I already read the reload topic in the wiki ("...equivalent of
Satan..." *g*). And it made me think about whether I really want do do
that. But the good thing (for me) is that I don't have for change the
reload pass for this as it is an additional pass, not a replacement. So
I have to disappoint you here.

That does not mean that this couldn't help in getting rid of the reload
pass. After the modification of the ddg, the reload pass doesn't have to
take care for optimization (very much) as this has already been done.
Hence, this could greatly simplify the process.

And I love your optimism :-)

Btw, I guess my advisor doesn't accept your argument. The dragon on my
dragon book is a very tough one *g*. And one of my advisor's arguments for
not implementing it for the GCC is that their compiler would be less
complicated. I can't confirm that since I don't have access to it yet.

Regards,
Michael Kruse

--
Tardyzentrismus verboten!

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