Re: Reserving a number of consecutive registers

[fearyourself <fearyourself at gmail dot com>]

> The reorg pass runs after register allocation.

> You could try to identify consecutive loads within basic blocks, group them

That is not too difficult, I've written a pass that checks for that
and identifies the loads.

- and rename registers or add
> copy insns to be able replace them with multiple loads.  Then you could rerun
> a cprop_hardreg pass to clean up things.

Ok, so if I copy the locally allocated registers into N consecutive
hard registers BEFORE the group of loads, then rerun cprp_harderg, it
should replace the ones of the loads to the ones of the copies ? And
then I suppose the copies will just disappear at a later pass, correct
?

I guess, my final question is, that pass will be defined with the
TARGET_MACHINE_DEPENDENT_REORG define but how do I see if a register
is free at that point ? Can I still use the TEST_HARD_REG_BIT macros ?

Thanks again,
Jc

On Mon, Apr 20, 2009 at 1:16 PM, Eric Botcazou <ebotcazou@adacore.com> wrote:
>> Does any architecture do such a "machine-specific reorg" pass. I've
>> looked around and haven't really seen one.
>
> IA-64 has one, to build bundles; it reuses the scheduler.
>
>> Could you give me an idea of where to look and how exactly that would work?
>
> The reorg pass runs after register allocation.  You could try to identify
> consecutive loads within basic blocks, group them and rename registers or add
> copy insns to be able replace them with multiple loads.  Then you could rerun
> a cprop_hardreg pass to clean up things.
>
> --
> Eric Botcazou
>