RE: How to define 2 bypasses for a single pair of insn_reservation

["Ye, Joey" <joey dot ye at intel dot com>]

Maxim Kuvyrkov [mailto:maxim@codesourcery.com] wrote:
> Yes, it does depend on this assumption and the comment states exactly that.
What I concerned is that the assumption may be broken someday, unless scheduler guarantees it.

> Which check[s] do you have in mind, the gcc_assert's?  Also, out of 
> curiosity, what is inefficient about the use of min_insn_conflict_delay?
> 
> For the record, min_insn_conflict delay has nothing to do with emulating 
> two bypasses; this tweak makes scheduler faster by not adding 
> instructions to the ready list which makes haifa-sched.c:max_issue() do 
> its exhaustive-like search on a smaller set.
I admit your implementation is probably the best correct solution based on current semantic. I'm just too lazy to like wrting that additional code and defining new data structure, especially after Vladimir said he could extend the semantic ;)

> Don't get me wrong, I'm not against adding support for N>1 bypasses; it 
> is not that easy though ;) .
No idea about the effort. But I guess you'd like to re-implement m68k with the 2nd bypass when it is ready.

Thanks - Joey