Re: ARM machine description: how are pool_ranges calculated

[Paul Brook <paul at codesourcery dot com>]

> When the offsets stored in the instructions are used, they refer to
> offsets from the address of the instruction (IA) plus 8 bytes. Are the
> pool_ranges also calculated from IA+8, from the address of the
> instruction itself or even from the address of the following
> instruction (IA+4)?
>
> In the md, the most common pairs of values are (-4084, +4096) (-1008,
> +1020) but there several other values in use for no obvious reason:
> +4092, -1004, -1012, +1024

IIRC they're the distance from the instruction being inserted to the start of 
the pool entry. The size of the current instruction is unknown, so the only 
sensible definition is from the end of the instruction for forward references 
and the start of the instruction for backward references.

There's maybe an extra -4 in there for the branch instruction, I don't 
remember exactly where that is accounted for.

All the other values should fall out from this.

> In practice, by compiling autogenerated test programs and objdumping them
> -d: 32-bit integer constants use from [pc, #-4092] to [pc, #4084]
> 64-bit constants in pairs of ARM registers use from [pc, #-3072] to

Empirical observations are of very limited use (except when the compiler is 
broken). It's extremely hard to construct cases that demonstrate worst-case 
boundary conditions.

> Two non-issues
>  - 64-bit alignment requirement for 64-bit quantities in EABI is not
> applied to the constant pools - 64-bit data is 32-bit aligned there,
> so no allowance of a possible extra 4 bytes for alignment is
> necessary.

The ABI says nothing about constant pools. The alignment requirements come 
from the instructions used to load 64-bit values.

Paul