This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: IRA accumulated costs


Hi Vlad,

Sorry for the slow reply.

Vladimir Makarov <vmakarov@redhat.com> writes:
> Hi, Richard.  Returning to accurate cost accumulation issue you found 
> recently.  Here is the patch fixing it.  You could try, if you want, how 
> MIPS  will behave with it.  The patch also more accurately calculates 
> ALLOCNO_CALL_FREQ which affects decision to spill allocno in 
> assign_hard_reg if it is more profitable.

Thanks, this seems to fix the worst of the problems.  A comparison
between IRA without this patch (first column) and IRA with it
(second column) gives:

-O0 -EB -mips16 -mabi=32 -mhard-float          4017361  4017361 :  100,00%
-O0 -EB -mips16 -mabi=32 -msoft-float          3999881  3999881 :  100,00%
-O0 -EB -mips16 -mabi=o64 -mhard-float         3989205  3989205 :  100,00%
-O0 -EB -mips16 -mabi=o64 -msoft-float         3971613  3971613 :  100,00%
-O0 -EB -mno-mips16 -mabi=32 -mhard-float      5859941  5859941 :  100,00%
-O0 -EB -mno-mips16 -mabi=32 -msoft-float      6416245  6416245 :  100,00%
-O0 -EB -mno-mips16 -mabi=o64 -mhard-float     5855285  5855285 :  100,00%
-O0 -EB -mno-mips16 -mabi=o64 -msoft-float     6180981  6180981 :  100,00%
-O0 -EL -mips16 -mabi=32 -mhard-float          4017201  4017201 :  100,00%
-O0 -EL -mips16 -mabi=32 -msoft-float          3999737  3999737 :  100,00%
-O0 -EL -mips16 -mabi=o64 -mhard-float         3988105  3988105 :  100,00%
-O0 -EL -mips16 -mabi=o64 -msoft-float         3970513  3970513 :  100,00%
-O0 -EL -mno-mips16 -mabi=32 -mhard-float      5859153  5859153 :  100,00%
-O0 -EL -mno-mips16 -mabi=32 -msoft-float      6415457  6415457 :  100,00%
-O0 -EL -mno-mips16 -mabi=o64 -mhard-float     5854253  5854253 :  100,00%
-O0 -EL -mno-mips16 -mabi=o64 -msoft-float     6179949  6179949 :  100,00%

-Os -EB -mips16 -mabi=32 -mhard-float          2840801  2847061 :  100,22%
-Os -EB -mips16 -mabi=32 -msoft-float          2823181  2829505 :  100,22%
-Os -EB -mips16 -mabi=o64 -mhard-float         2855585  2865685 :  100,35%
-Os -EB -mips16 -mabi=o64 -msoft-float         2837053  2847185 :  100,36%
-Os -EB -mno-mips16 -mabi=32 -mhard-float      3502533  3498173 :   99,88%
-Os -EB -mno-mips16 -mabi=32 -msoft-float      3974545  3979529 :  100,13%
-Os -EB -mno-mips16 -mabi=o64 -mhard-float     3503233  3497721 :   99,84%
-Os -EB -mno-mips16 -mabi=o64 -msoft-float     3766401  3764697 :   99,95%
-Os -EL -mips16 -mabi=32 -mhard-float          2840325  2846345 :  100,21%
-Os -EL -mips16 -mabi=32 -msoft-float          2822369  2828437 :  100,21%
-Os -EL -mips16 -mabi=o64 -mhard-float         2855409  2865477 :  100,35%
-Os -EL -mips16 -mabi=o64 -msoft-float         2836877  2846977 :  100,36%
-Os -EL -mno-mips16 -mabi=32 -mhard-float      3501909  3497581 :   99,88%
-Os -EL -mno-mips16 -mabi=32 -msoft-float      3971025  3974265 :  100,08%
-Os -EL -mno-mips16 -mabi=o64 -mhard-float     3502465  3496921 :   99,84%
-Os -EL -mno-mips16 -mabi=o64 -msoft-float     3765617  3763865 :   99,95%

A comparison between -fno-ira (first column) and post-patch -fira
(second column) gives:

-O0 -EB -mips16 -mabi=32 -mhard-float          4574105  4017361 :   87,83%
-O0 -EB -mips16 -mabi=32 -msoft-float          4556001  3999881 :   87,79%
-O0 -EB -mips16 -mabi=o64 -mhard-float         4335849  3989205 :   92,01%
-O0 -EB -mips16 -mabi=o64 -msoft-float         4318545  3971613 :   91,97%
-O0 -EB -mno-mips16 -mabi=32 -mhard-float      6006793  5859941 :   97,56%
-O0 -EB -mno-mips16 -mabi=32 -msoft-float      6762617  6416245 :   94,88%
-O0 -EB -mno-mips16 -mabi=o64 -mhard-float     5993805  5855285 :   97,69%
-O0 -EB -mno-mips16 -mabi=o64 -msoft-float     6313853  6180981 :   97,90%
-O0 -EL -mips16 -mabi=32 -mhard-float          4573849  4017201 :   87,83%
-O0 -EL -mips16 -mabi=32 -msoft-float          4555761  3999737 :   87,80%
-O0 -EL -mips16 -mabi=o64 -mhard-float         4334697  3988105 :   92,00%
-O0 -EL -mips16 -mabi=o64 -msoft-float         4317377  3970513 :   91,97%
-O0 -EL -mno-mips16 -mabi=32 -mhard-float      6005941  5859153 :   97,56%
-O0 -EL -mno-mips16 -mabi=32 -msoft-float      6761765  6415457 :   94,88%
-O0 -EL -mno-mips16 -mabi=o64 -mhard-float     5992709  5854253 :   97,69%
-O0 -EL -mno-mips16 -mabi=o64 -msoft-float     6312741  6179949 :   97,90%

-Os -EB -mips16 -mabi=32 -mhard-float          2839301  2847061 :  100,27%
-Os -EB -mips16 -mabi=32 -msoft-float          2821557  2829505 :  100,28%
-Os -EB -mips16 -mabi=o64 -mhard-float         2837689  2865685 :  100,99%
-Os -EB -mips16 -mabi=o64 -msoft-float         2819173  2847185 :  100,99%
-Os -EB -mno-mips16 -mabi=32 -mhard-float      3498305  3498173 :  100,00%
-Os -EB -mno-mips16 -mabi=32 -msoft-float      3978845  3979529 :  100,02%
-Os -EB -mno-mips16 -mabi=o64 -mhard-float     3497981  3497721 :   99,99%
-Os -EB -mno-mips16 -mabi=o64 -msoft-float     3756781  3764697 :  100,21%
-Os -EL -mips16 -mabi=32 -mhard-float          2838829  2846345 :  100,26%
-Os -EL -mips16 -mabi=32 -msoft-float          2820877  2828437 :  100,27%
-Os -EL -mips16 -mabi=o64 -mhard-float         2837133  2865477 :  101,00%
-Os -EL -mips16 -mabi=o64 -msoft-float         2818585  2846977 :  101,01%
-Os -EL -mno-mips16 -mabi=32 -mhard-float      3497841  3497581 :   99,99%
-Os -EL -mno-mips16 -mabi=32 -msoft-float      3976845  3974265 :   99,94%
-Os -EL -mno-mips16 -mabi=o64 -mhard-float     3497261  3496921 :   99,99%
-Os -EL -mno-mips16 -mabi=o64 -msoft-float     3756093  3763865 :  100,21%

Of the remaining -mno-mips16 regressions, one of the worst seems to
be a case in which we allocate an easily-rematerialisable constant to
a call-saved register at the expense of using a call-clobbered register
for a call-crossing, non-rematerialisable register.  I'll look at that
in more detail when I get time.  There's also obviously some work
to do on MIPS16.

Even so, I'm now fairly confident that we should put GR_REGS and ACC_REGS
in the same cover class, which was the main area of doubt.  I'll therefore
commit the MIPS port in a sec.  Is it OK if I commit it to ira-merge
as well?

Richard


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]