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Re: Missing gen_sse2_cvtdq2p in convert splitter?
- From: "Uros Bizjak" <ubizjak at gmail dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: "GCC Development" <gcc at gcc dot gnu dot org>, "Guo, Xuepeng" <xuepeng dot guo at intel dot com>
- Date: Wed, 8 Oct 2008 08:57:01 +0200
- Subject: Re: Missing gen_sse2_cvtdq2p in convert splitter?
- References: <6dc9ffc80810072329g145af532pdb9f9c7802d9e7ab@mail.gmail.com>
On Wed, Oct 8, 2008 at 8:29 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> I386.md has
>
> (define_split
> [(set (match_operand:MODEF 0 "register_operand" "")
> (float:MODEF (match_operand:SI 1 "register_operand" "")))]
> "TARGET_SSE2 && TARGET_SSE_MATH
> && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
> && reload_completed
> && (SSE_REG_P (operands[0])
> || (GET_CODE (operands[0]) == SUBREG
> && SSE_REG_P (operands[0])))"
> [(const_int 0)]
> {
> rtx op1 = operands[1];
>
> operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0],
> <MODE>mode, 0);
> if (GET_CODE (op1) == SUBREG)
> op1 = SUBREG_REG (op1);
>
> if (GENERAL_REG_P (op1) && TARGET_INTER_UNIT_MOVES)
> {
> operands[4] = simplify_gen_subreg (V4SImode, operands[0], <MODE>mode, 0);
> emit_insn (gen_sse2_loadld (operands[4],
> CONST0_RTX (V4SImode), operands[1]));
> }
> /* We can ignore possible trapping value in the
> high part of SSE register for non-trapping math. */
> else if (SSE_REG_P (op1) && !flag_trapping_math)
> operands[4] = simplify_gen_subreg (V4SImode, operands[1], SImode, 0);
> else
> gcc_unreachable ();
> })
>
> Aren't
>
> emit_insn
> (gen_sse2_cvtdq2p<ssemodefsuffix> (operands[3], operands[4]));
> DONE;
>
> missing at the end?
Uh, yes.
The patch is pre-approved as obvious.
Thanks,
Uros.