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Re: How to write pattern for addition with carry operation

From: Uros Bizjak <ubizjak at gmail dot com>
To: GCC <gcc at gcc dot gnu dot org>
Cc: "Mohamed Shafi" <shafitvm at gmail dot com>
Date: Sat, 07 Jun 2008 09:32:49 +0200
Subject: Re: How to write pattern for addition with carry operation

Hello!

The 16bit target that i am porting to gcc4.1.2 doesn't have any
instructions for 32bit operations. But for addition and subtraction
there is
addc
subc
instructions that consider carry bit also. Presently i have patterns
for SImode addition and subtraction such that the template will have

add %0, %1\naddc %N0, %N1
sub %0, %1\nsubc %N0, %N1

Will it be possible for me to write separate patterns for the instructions add and addc?

You can look into config/i386.md, how i.e. adddi3 is expanded and split in case of !TARGET_64BIT.

Uros.

Follow-Ups:
- Re: How to write pattern for addition with carry operation
  - From: Mohamed Shafi

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