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Re: more m32c brokenness
- From: DJ Delorie <dj at redhat dot com>
- To: "Richard Guenther" <richard dot guenther at gmail dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Thu, 15 May 2008 14:15:46 -0400
- Subject: Re: more m32c brokenness
- References: <200804090128.m391SYsD007390@greed.delorie.com> <email@example.com> <200804091405.m39E59fG011729@greed.delorie.com> <firstname.lastname@example.org> <200804092040.m39Keocw026006@greed.delorie.com> <email@example.com> <200805150044.m4F0ipmG022117@greed.delorie.com> <firstname.lastname@example.org>
> The patch simply enabled type checking by default. As I don't see how
> we can easily address the underlying problem can you try the following
> which simply makes this typechecking weaker?
That seems to work.
FYI test results show 98% pass rate for C++ and 98.6% pass rate for C,
so I'm not sure what the "underlying problem" is, other than
inappropriate assumptions about what backends do.
To recap: the m32c/80 family of chips does not have an integer type
which is the same size as pointer types, and which has sufficient math
support in the chip to satisfy gcc's assumption of riscness. Thus,
sizeof(size_t) < sizeof(void *) (16 < 24). Yes, it really does have
24 bit address registers.