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Re: RFC: PowerPC floating point features
Joseph S. Myers wrote:
On Fri, 4 Apr 2008, Michael Eager wrote:
Xilinx has a PowerPC 405 processor with an attached
single precision floating point processor. I have a
patch which supports this FP unit, but want to clean
it up a bit before submitting it.
What do you propose as the function call and return ABI when this is in
use? At present we (32-bit GNU/Linux and EABI) have a hard-float ABI
(TARGET_HARD_FLOAT && TARGET_FPRS), which relies on 64-bit FPRs to be able
to pass double (so isn't usable if this processor only has 32-bit FPRs),
and a soft-float ABI, also used on E500, passing floating point types in
GPRs (32 bits of each GPR, not using the E500 high parts). Are you going
to use the soft-float ABI and take the performance cost of doing so, or do
you propose a hybrid ABI passing float in FPRs and double in GPRs? If you
propose the latter then you should work with the Power.org ABI working
group on defining the ABI properly.
It's a hybrid ABI. Floats are passed in single precision FPRs,
doubles are passed in pairs of GPRs.
I'll look into what power.org is doing. Do you have a contact?
(Whatever you do, you may wish to consider how to define flags relating to
the ABI separately from those relating to code generation.)
I look into this.
--
Michael Eager eager@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077