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insn appears multiple times


Hi!

For my architecture with 4 branch delay slots I get the following RTL in my target dependent reorg pass:

(insn 966 361 364 ../src/XXX.c:1666 (sequence [
(jump_insn 362 361 381 ../src/XXX.c:1666 (set (pc)
(if_then_else (ne (reg:CC 49 CONDSEL)
(const_int 0 [0x0]))
(label_ref:SI 965)
(pc))) 40 {bCOND_internal} (insn_list:REG_DEP_TRUE 361 (nil))
(expr_list:REG_BR_PRED (const_int 4 [0x4])
(expr_list:REG_DEAD (reg:CC 49 CONDSEL)
(expr_list:REG_BR_PROB (const_int 8100 [0x1fa4])
(nil)))))
(insn 381 362 364 (set (reg:SI 3 R3 [orig:135 refIdxL0A. 100 ] [135])
(mem/c/i:SI (reg/f:SI 44 A12) [0 refIdxL0A+0 S32 A32])) 2 {load_register_internal} (nil)
(nil))
]) -1 (nil)
(nil))


(note 364 966 366 [bb 34] NOTE_INSN_BASIC_BLOCK)
...
(note 372 370 375 [bb 35] NOTE_INSN_BASIC_BLOCK)
...
(note 380 967 381 [bb 36] NOTE_INSN_BASIC_BLOCK)

(insn 381 380 965 ../src/XXX.c:1666 (set (reg:SI 3 R3 [orig:135 refIdxL0A.100 ] [135])
(mem/c/i:SI (reg/f:SI 44 A12) [0 refIdxL0A+0 S32 A32])) 2 {load_register_internal} (nil)
(nil))


insn 381 appears in the delay slot and later in another basic block (but same function). These insns are equal but they are not the same, two disjunct pieces of memory.

Is this possible?

Thanks,
Boris


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