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Re: Register allocation issues
On 9/6/07, Dave Korn <dave.korn@artimi.com> wrote:
> On 05 September 2007 23:47, Matt Lee wrote:
>
> > Registers r3 to r12 are volatiles. However, for the C code below,
> >
> > struct foo {
> > int a[4];
> > } ;
> >
> > struct foo p, q;
> >
> > void func ()
> > {
> > memcpy (&p, &q, sizeof (struct foo));
> > }
> >
> > I am getting a instruction sequence for func() such as,
> >
> > load r3, q + 0
> > load r4, q + 4
> > store r3, p + 0
> > store r4, p + 4
> > load r3, q + 4
> > load r4, q + 8
> > store r3, p + 4
> > store r4, p + 8
> >
> > The problem is, that though the loads can be optimized by pipelining
> > them. The register allocator has created a dependency by using only r3
> > and r4, instead of using the other volatiles.
>
> Does your backend define a movdi pattern?
>
>
Yes it does. But in this case, these are word-by-word moves from
memory to memory and make use of only movsi.
--
thanks,
Matt